ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Intel 8051), page 1. Symbol Table .__.ABS. = 0000 G A 00E0 17 A$spi0_master$1000 00E4 GR 17 A$spi0_master$1001 00E5 GR 17 A$spi0_master$1002 00E6 GR 17 A$spi0_master$1003 00E7 GR 17 A$spi0_master$1004 00E8 GR 17 A$spi0_master$1007 00EA GR 17 A$spi0_master$1010 00EB GR 17 A$spi0_master$1011 00EC GR 17 A$spi0_master$1012 00ED GR 17 A$spi0_master$1013 00EE GR 17 A$spi0_master$1014 00EF GR 17 A$spi0_master$1015 00F0 GR 17 A$spi0_master$1016 00F1 GR 17 A$spi0_master$1017 00F2 GR 17 A$spi0_master$1018 00F3 GR 17 A$spi0_master$1019 00F4 GR 17 A$spi0_master$1020 00F5 GR 17 A$spi0_master$1021 00F6 GR 17 A$spi0_master$1022 00F7 GR 17 A$spi0_master$1023 00F8 GR 17 A$spi0_master$1027 00FA GR 17 A$spi0_master$1030 00FD GR 17 A$spi0_master$1031 00FE GR 17 A$spi0_master$1034 0100 GR 17 A$spi0_master$1037 0102 GR 17 A$spi0_master$1051 0103 GR 17 A$spi0_master$1054 0106 GR 17 A$spi0_master$1055 0109 GR 17 A$spi0_master$1059 010A GR 17 A$spi0_master$1062 010D GR 17 A$spi0_master$1076 010E GR 17 A$spi0_master$1079 0111 GR 17 A$spi0_master$1080 0114 GR 17 A$spi0_master$1084 0115 GR 17 A$spi0_master$1087 0118 GR 17 A$spi0_master$1101 0119 GR 17 A$spi0_master$1104 011C GR 17 A$spi0_master$1105 011F GR 17 A$spi0_master$1109 0120 GR 17 A$spi0_master$1112 0123 GR 17 A$spi0_master$1126 0124 GR 17 A$spi0_master$1129 0126 GR 17 A$spi0_master$1143 0127 GR 17 A$spi0_master$1146 0129 GR 17 A$spi0_master$1147 012B GR 17 A$spi0_master$1150 012D GR 17 A$spi0_master$1151 012E GR 17 A$spi0_master$1152 012F GR 17 A$spi0_master$1153 0131 GR 17 A$spi0_master$1157 0133 GR 17 A$spi0_master$1158 0135 GR 17 A$spi0_master$1161 0137 GR 17 A$spi0_master$1173 0138 GR 17 A$spi0_master$1174 013A GR 17 A$spi0_master$1177 013C GR 17 A$spi0_master$1178 013E GR 17 A$spi0_master$1179 013F GR 17 A$spi0_master$1180 0141 GR 17 A$spi0_master$1181 0142 GR 17 A$spi0_master$1182 0143 GR 17 A$spi0_master$1183 0145 GR 17 A$spi0_master$1186 0147 GR 17 A$spi0_master$1187 0149 GR 17 A$spi0_master$1190 014B GR 17 A$spi0_master$1191 014D GR 17 A$spi0_master$1192 014E GR 17 A$spi0_master$1193 0150 GR 17 A$spi0_master$1194 0151 GR 17 A$spi0_master$1195 0152 GR 17 A$spi0_master$1198 0154 GR 17 A$spi0_master$1199 0156 GR 17 A$spi0_master$1200 0157 GR 17 A$spi0_master$1201 0159 GR 17 A$spi0_master$1202 015A GR 17 A$spi0_master$1203 015B GR 17 A$spi0_master$1206 015D GR 17 A$spi0_master$1207 015F GR 17 A$spi0_master$1208 0161 GR 17 A$spi0_master$1209 0162 GR 17 A$spi0_master$1212 0164 GR 17 A$spi0_master$1216 0166 GR 17 A$spi0_master$1230 0167 GR 17 A$spi0_master$1231 0169 GR 17 A$spi0_master$1232 016C GR 17 A$spi0_master$1235 016D GR 17 A$spi0_master$1236 0170 GR 17 A$spi0_master$1239 0173 GR 17 A$spi0_master$1240 0176 GR 17 A$spi0_master$1243 0179 GR 17 A$spi0_master$1244 017C GR 17 A$spi0_master$1245 017D GR 17 A$spi0_master$1248 017F GR 17 A$spi0_master$1252 0181 GR 17 A$spi0_master$1253 0183 GR 17 A$spi0_master$1254 0185 GR 17 A$spi0_master$1257 0187 GR 17 A$spi0_master$1258 018A GR 17 A$spi0_master$1261 018B GR 17 A$spi0_master$1262 018D GR 17 A$spi0_master$1276 018E GR 17 A$spi0_master$1279 0191 GR 17 A$spi0_master$1291 0194 GR 17 A$spi0_master$1292 0196 GR 17 A$spi0_master$1293 0198 GR 17 A$spi0_master$1294 019A GR 17 A$spi0_master$1295 019C GR 17 A$spi0_master$1298 019F GR 17 A$spi0_master$1301 01A1 GR 17 A$spi0_master$1302 01A4 GR 17 A$spi0_master$1303 01A7 GR 17 A$spi0_master$1304 01A9 GR 17 A$spi0_master$1307 01AA GR 17 A$spi0_master$1308 01AC GR 17 A$spi0_master$1309 01AD GR 17 A$spi0_master$1310 01B0 GR 17 A$spi0_master$1314 01B2 GR 17 A$spi0_master$1315 01B4 GR 17 A$spi0_master$1316 01B6 GR 17 A$spi0_master$1317 01B9 GR 17 A$spi0_master$1321 01BB GR 17 A$spi0_master$1322 01BD GR 17 A$spi0_master$1323 01BF GR 17 A$spi0_master$1326 01C1 GR 17 A$spi0_master$1327 01C3 GR 17 A$spi0_master$1328 01C4 GR 17 A$spi0_master$1329 01C7 GR 17 A$spi0_master$1333 01C9 GR 17 A$spi0_master$1334 01CC GR 17 A$spi0_master$1335 01CF GR 17 A$spi0_master$1336 01D0 GR 17 A$spi0_master$1337 01D2 GR 17 A$spi0_master$1341 01D4 GR 17 A$spi0_master$1343 01D6 GR 17 A$spi0_master$1344 01D8 GR 17 A$spi0_master$1345 01DA GR 17 A$spi0_master$1346 01DC GR 17 A$spi0_master$1349 01DE GR 15 A$spi0_master$763 0000 GR 15 A$spi0_master$764 0001 GR 15 A$spi0_master$765 0003 GR 15 A$spi0_master$769 0005 GR 15 A$spi0_master$770 0006 GR 15 A$spi0_master$771 0008 GR 15 A$spi0_master$775 000A GR 15 A$spi0_master$776 000B GR 15 A$spi0_master$777 000D GR 17 A$spi0_master$808 0000 GR 17 A$spi0_master$811 0003 GR 17 A$spi0_master$814 0006 GR 17 A$spi0_master$817 0009 GR 17 A$spi0_master$820 000C GR 17 A$spi0_master$823 000F GR 17 A$spi0_master$826 0011 GR 17 A$spi0_master$829 0013 GR 17 A$spi0_master$842 0014 GR 17 A$spi0_master$843 0016 GR 17 A$spi0_master$844 0018 GR 17 A$spi0_master$845 001A GR 17 A$spi0_master$848 001B GR 17 A$spi0_master$849 001C GR 17 A$spi0_master$850 001D GR 17 A$spi0_master$851 001F GR 17 A$spi0_master$852 0020 GR 17 A$spi0_master$853 0022 GR 17 A$spi0_master$854 0023 GR 17 A$spi0_master$855 0025 GR 17 A$spi0_master$856 0026 GR 17 A$spi0_master$857 0028 GR 17 A$spi0_master$858 002A GR 17 A$spi0_master$859 002C GR 17 A$spi0_master$860 002D GR 17 A$spi0_master$861 002F GR 17 A$spi0_master$862 0030 GR 17 A$spi0_master$863 0032 GR 17 A$spi0_master$864 0033 GR 17 A$spi0_master$865 0034 GR 17 A$spi0_master$866 0035 GR 17 A$spi0_master$870 0037 GR 17 A$spi0_master$874 0038 GR 17 A$spi0_master$876 003A GR 17 A$spi0_master$877 003B GR 17 A$spi0_master$878 003D GR 17 A$spi0_master$879 003E GR 17 A$spi0_master$880 0040 GR 17 A$spi0_master$881 0041 GR 17 A$spi0_master$882 0043 GR 17 A$spi0_master$883 0044 GR 17 A$spi0_master$884 0045 GR 17 A$spi0_master$885 0046 GR 17 A$spi0_master$888 0048 GR 17 A$spi0_master$891 0049 GR 17 A$spi0_master$892 004A GR 17 A$spi0_master$893 004B GR 17 A$spi0_master$894 004C GR 17 A$spi0_master$895 004D GR 17 A$spi0_master$896 004E GR 17 A$spi0_master$897 004F GR 17 A$spi0_master$898 0050 GR 17 A$spi0_master$899 0051 GR 17 A$spi0_master$900 0052 GR 17 A$spi0_master$901 0053 GR 17 A$spi0_master$902 0054 GR 17 A$spi0_master$903 0055 GR 17 A$spi0_master$904 0056 GR 17 A$spi0_master$908 0058 GR 17 A$spi0_master$909 005A GR 17 A$spi0_master$910 005B GR 17 A$spi0_master$911 005C GR 17 A$spi0_master$912 005D GR 17 A$spi0_master$913 005E GR 17 A$spi0_master$914 005F GR 17 A$spi0_master$915 0060 GR 17 A$spi0_master$916 0061 GR 17 A$spi0_master$917 0062 GR 17 A$spi0_master$918 0063 GR 17 A$spi0_master$919 0064 GR 17 A$spi0_master$920 0065 GR 17 A$spi0_master$921 0068 GR 17 A$spi0_master$922 0069 GR 17 A$spi0_master$923 006B GR 17 A$spi0_master$924 006D GR 17 A$spi0_master$925 006F GR 17 A$spi0_master$926 0071 GR 17 A$spi0_master$927 0073 GR 17 A$spi0_master$928 0075 GR 17 A$spi0_master$929 0078 GR 17 A$spi0_master$930 007B GR 17 A$spi0_master$931 007E GR 17 A$spi0_master$932 0081 GR 17 A$spi0_master$933 0083 GR 17 A$spi0_master$934 0085 GR 17 A$spi0_master$935 0087 GR 17 A$spi0_master$936 0089 GR 17 A$spi0_master$937 008B GR 17 A$spi0_master$938 008D GR 17 A$spi0_master$939 008F GR 17 A$spi0_master$940 0090 GR 17 A$spi0_master$941 0091 GR 17 A$spi0_master$942 0092 GR 17 A$spi0_master$943 0093 GR 17 A$spi0_master$944 0094 GR 17 A$spi0_master$945 0095 GR 17 A$spi0_master$946 0096 GR 17 A$spi0_master$947 0097 GR 17 A$spi0_master$948 0098 GR 17 A$spi0_master$949 0099 GR 17 A$spi0_master$950 009A GR 17 A$spi0_master$951 009D GR 17 A$spi0_master$952 009E GR 17 A$spi0_master$953 00A0 GR 17 A$spi0_master$954 00A2 GR 17 A$spi0_master$955 00A5 GR 17 A$spi0_master$956 00A7 GR 17 A$spi0_master$957 00A9 GR 17 A$spi0_master$958 00AB GR 17 A$spi0_master$959 00AC GR 17 A$spi0_master$960 00AE GR 17 A$spi0_master$961 00B0 GR 17 A$spi0_master$962 00B1 GR 17 A$spi0_master$963 00B2 GR 17 A$spi0_master$964 00B4 GR 17 A$spi0_master$965 00B5 GR 17 A$spi0_master$966 00B6 GR 17 A$spi0_master$967 00B7 GR 17 A$spi0_master$968 00B8 GR 17 A$spi0_master$969 00B9 GR 17 A$spi0_master$970 00BA GR 17 A$spi0_master$971 00BC GR 17 A$spi0_master$972 00BE GR 17 A$spi0_master$973 00C0 GR 17 A$spi0_master$974 00C1 GR 17 A$spi0_master$975 00C4 GR 17 A$spi0_master$976 00C6 GR 17 A$spi0_master$977 00C8 GR 17 A$spi0_master$978 00CA GR 17 A$spi0_master$979 00CB GR 17 A$spi0_master$980 00CD GR 17 A$spi0_master$981 00CE GR 17 A$spi0_master$982 00D0 GR 17 A$spi0_master$983 00D1 GR 17 A$spi0_master$984 00D2 GR 17 A$spi0_master$985 00D4 GR 17 A$spi0_master$986 00D5 GR 17 A$spi0_master$987 00D6 GR 17 A$spi0_master$988 00D8 GR 17 A$spi0_master$989 00D9 GR 17 A$spi0_master$990 00DA GR 17 A$spi0_master$991 00DC GR 17 A$spi0_master$995 00DD GR 17 A$spi0_master$996 00DE GR 17 A$spi0_master$997 00E0 GR 17 A$spi0_master$998 00E1 GR 17 A$spi0_master$999 00E3 GR A.0 00E0 A.1 00E1 A.2 00E2 A.3 00E3 A.4 00E4 A.5 00E5 A.6 00E6 A.7 00E7 AC 00D6 ACC 00E0 ACC.0 00E0 ACC.1 00E1 ACC.2 00E2 ACC.3 00E3 ACC.4 00E4 ACC.5 00E5 ACC.6 00E6 ACC.7 00E7 B 00F0 B.0 00F0 B.1 00F1 B.2 00F2 B.3 00F3 B.4 00F4 B.5 00F5 B.6 00F6 B.7 00F7 17 C$spi0_master.c$102$1$1 = 0006 GR 17 C$spi0_master.c$111$1$1 = 0009 GR 17 C$spi0_master.c$112$1$1 = 000C GR 17 C$spi0_master.c$114$1$1 = 000F GR 17 C$spi0_master.c$115$1$1 = 0011 GR 17 C$spi0_master.c$116$1$1 = 0013 GR 17 C$spi0_master.c$118$1$1 = 0014 GR 17 C$spi0_master.c$124$1$1 = 001B GR 17 C$spi0_master.c$125$1$1 = 0037 GR 17 C$spi0_master.c$128$1$1 = 0038 GR 17 C$spi0_master.c$130$2$2 = 0048 GR 17 C$spi0_master.c$131$2$2 = 0049 GR 17 C$spi0_master.c$136$1$1 = 0058 GR 17 C$spi0_master.c$139$1$1 = 00DD GR 17 C$spi0_master.c$141$2$3 = 00EA GR 17 C$spi0_master.c$142$2$3 = 00EB GR 17 C$spi0_master.c$144$1$1 = 00FA GR 17 C$spi0_master.c$145$1$1 = 00FD GR 17 C$spi0_master.c$146$1$1 = 0100 GR 17 C$spi0_master.c$147$1$1 = 0102 GR 17 C$spi0_master.c$149$1$1 = 0103 GR 17 C$spi0_master.c$151$1$1 = 0103 GR 17 C$spi0_master.c$153$2$2 = 0106 GR 17 C$spi0_master.c$157$2$3 = 010A GR 17 C$spi0_master.c$159$1$1 = 010D GR 17 C$spi0_master.c$161$1$1 = 010E GR 17 C$spi0_master.c$163$1$1 = 010E GR 17 C$spi0_master.c$165$2$2 = 0111 GR 17 C$spi0_master.c$169$2$3 = 0115 GR 17 C$spi0_master.c$171$1$1 = 0118 GR 17 C$spi0_master.c$173$1$1 = 0119 GR 17 C$spi0_master.c$175$1$1 = 0119 GR 17 C$spi0_master.c$177$2$2 = 011C GR 17 C$spi0_master.c$181$2$3 = 0120 GR 17 C$spi0_master.c$183$1$1 = 0123 GR 17 C$spi0_master.c$185$1$1 = 0124 GR 17 C$spi0_master.c$187$1$1 = 0124 GR 17 C$spi0_master.c$188$1$1 = 0126 GR 17 C$spi0_master.c$190$1$1 = 0127 GR 17 C$spi0_master.c$195$1$1 = 0127 GR 17 C$spi0_master.c$196$1$1 = 0129 GR 17 C$spi0_master.c$197$1$1 = 012D GR 17 C$spi0_master.c$199$1$1 = 0133 GR 17 C$spi0_master.c$200$1$1 = 0137 GR 17 C$spi0_master.c$202$1$1 = 0138 GR 17 C$spi0_master.c$204$1$1 = 013C GR 17 C$spi0_master.c$206$2$2 = 0147 GR 17 C$spi0_master.c$207$2$2 = 014B GR 17 C$spi0_master.c$208$2$2 = 0154 GR 17 C$spi0_master.c$210$2$2 = 015D GR 17 C$spi0_master.c$211$2$2 = 0164 GR 17 C$spi0_master.c$213$2$1 = 0166 GR 17 C$spi0_master.c$215$2$1 = 0167 GR 17 C$spi0_master.c$219$1$1 = 016D GR 17 C$spi0_master.c$220$1$1 = 0173 GR 17 C$spi0_master.c$222$1$1 = 0179 GR 17 C$spi0_master.c$223$1$1 = 017F GR 17 C$spi0_master.c$225$1$1 = 0181 GR 17 C$spi0_master.c$226$1$1 = 0187 GR 17 C$spi0_master.c$227$1$1 = 018B GR 17 C$spi0_master.c$229$1$1 = 018E GR 17 C$spi0_master.c$231$1$1 = 018E GR 17 C$spi0_master.c$232$1$1 = 0191 GR 17 C$spi0_master.c$234$1$1 = 0194 GR 17 C$spi0_master.c$236$1$1 = 019F GR 17 C$spi0_master.c$238$1$1 = 01A1 GR 17 C$spi0_master.c$239$1$1 = 01AA GR 17 C$spi0_master.c$240$1$1 = 01B2 GR 17 C$spi0_master.c$242$1$1 = 01BB GR 17 C$spi0_master.c$244$2$2 = 01C1 GR 17 C$spi0_master.c$245$2$2 = 01C9 GR 17 C$spi0_master.c$249$2$3 = 01D4 GR 17 C$spi0_master.c$251$1$1 = 01DE GR 15 C$spi0_master.c$55$1$1 = 0000 GR 15 C$spi0_master.c$58$1$1 = 0005 GR 15 C$spi0_master.c$61$1$1 = 000A GR 17 C$spi0_master.c$63$0$0 = 0000 GR 17 C$spi0_master.c$90$1$1 = 0000 GR 17 C$spi0_master.c$91$1$1 = 0003 GR CPRL2 00C8 CT2 00C9 CY 00D7 DPH 0083 DPL 0082 EA 00AF ES 00AC ET0 00A9 ET1 00AB ET2 00AD EX0 00A8 EX1 00AA EXEN2 00CB EXF2 00CE F0 00D5 Fspi0_master$AC$0$0 = 00D6 G Fspi0_master$ACC$0$0 = 00E0 G Fspi0_master$ACC_0$0$0 = 00E0 G Fspi0_master$ACC_1$0$0 = 00E1 G Fspi0_master$ACC_2$0$0 = 00E2 G Fspi0_master$ACC_3$0$0 = 00E3 G Fspi0_master$ACC_4$0$0 = 00E4 G Fspi0_master$ACC_5$0$0 = 00E5 G Fspi0_master$ACC_6$0$0 = 00E6 G Fspi0_master$ACC_7$0$0 = 00E7 G Fspi0_master$ADC$0$0 = FFFFBBBA G Fspi0_master$ADCCFG$0$0 = 00F2 G Fspi0_master$ADCCON1$0$0 = 00B4 G Fspi0_master$ADCCON2$0$0 = 00B5 G Fspi0_master$ADCCON3$0$0 = 00B6 G Fspi0_master$ADCH$0$0 = 00BB G Fspi0_master$ADCIE$0$0 = 00A9 G Fspi0_master$ADCIF$0$0 = 008D G Fspi0_master$ADCL$0$0 = 00BA G Fspi0_master$ADDR$0$0 = DF05 G Fspi0_master$AGCCTRL0$0$0 = DF19 G Fspi0_master$AGCCTRL1$0$0 = DF18 G Fspi0_master$AGCCTRL2$0$0 = DF17 G Fspi0_master$B$0$0 = 00F0 G Fspi0_master$BSCFG$0$0 = DF16 G Fspi0_master$B_0$0$0 = 00F0 G Fspi0_master$B_1$0$0 = 00F1 G Fspi0_master$B_2$0$0 = 00F2 G Fspi0_master$B_3$0$0 = 00F3 G Fspi0_master$B_4$0$0 = 00F4 G Fspi0_master$B_5$0$0 = 00F5 G Fspi0_master$B_6$0$0 = 00F6 G Fspi0_master$B_7$0$0 = 00F7 G Fspi0_master$CHANNR$0$0 = DF06 G Fspi0_master$CLKCON$0$0 = 00C6 G Fspi0_master$CY$0$0 = 00D7 G Fspi0_master$DEVIATN$0$0 = DF11 G Fspi0_master$DMA0CFG$0$0 = FFFFD5D4 G Fspi0_master$DMA0CFGH$0$0 = 00D5 G Fspi0_master$DMA0CFGL$0$0 = 00D4 G Fspi0_master$DMA1CFG$0$0 = FFFFD3D2 G Fspi0_master$DMA1CFGH$0$0 = 00D3 G Fspi0_master$DMA1CFGL$0$0 = 00D2 G Fspi0_master$DMAARM$0$0 = 00D6 G Fspi0_master$DMAIE$0$0 = 00B8 G Fspi0_master$DMAIF$0$0 = 00C0 G Fspi0_master$DMAIRQ$0$0 = 00D1 G Fspi0_master$DMAREQ$0$0 = 00D7 G Fspi0_master$DPH0$0$0 = 0083 G Fspi0_master$DPH1$0$0 = 0085 G Fspi0_master$DPL0$0$0 = 0082 G Fspi0_master$DPL1$0$0 = 0084 G Fspi0_master$DPS$0$0 = 0092 G Fspi0_master$EA$0$0 = 00AF G Fspi0_master$ENCCS$0$0 = 00B3 G Fspi0_master$ENCDI$0$0 = 00B1 G Fspi0_master$ENCDO$0$0 = 00B2 G Fspi0_master$ENCIE$0$0 = 00AC G Fspi0_master$ENCIF_0$0$0 = 0098 G Fspi0_master$ENCIF_1$0$0 = 0099 G Fspi0_master$ENDIAN$0$0 = 0095 G Fspi0_master$F0$0$0 = 00D5 G Fspi0_master$F1$0$0 = 00D1 G Fspi0_master$FADDR$0$0 = FFFFADAC G Fspi0_master$FADDRH$0$0 = 00AD G Fspi0_master$FADDRL$0$0 = 00AC G Fspi0_master$FCTL$0$0 = 00AE G Fspi0_master$FOCCFG$0$0 = DF15 G Fspi0_master$FREND0$0$0 = DF1B G Fspi0_master$FREND1$0$0 = DF1A G Fspi0_master$FREQ0$0$0 = DF0B G Fspi0_master$FREQ1$0$0 = DF0A G Fspi0_master$FREQ2$0$0 = DF09 G Fspi0_master$FREQEST$0$0 = DF38 G Fspi0_master$FSCAL0$0$0 = DF1F G Fspi0_master$FSCAL1$0$0 = DF1E G Fspi0_master$FSCAL2$0$0 = DF1D G Fspi0_master$FSCAL3$0$0 = DF1C G Fspi0_master$FSCTRL0$0$0 = DF08 G Fspi0_master$FSCTRL1$0$0 = DF07 G Fspi0_master$FWDATA$0$0 = 00AF G Fspi0_master$FWT$0$0 = 00AB G Fspi0_master$I2SCFG0$0$0 = DF40 G Fspi0_master$I2SCFG1$0$0 = DF41 G Fspi0_master$I2SCLKF0$0$0 = DF46 G Fspi0_master$I2SCLKF1$0$0 = DF47 G Fspi0_master$I2SCLKF2$0$0 = DF48 G Fspi0_master$I2SDATH$0$0 = DF43 G Fspi0_master$I2SDATL$0$0 = DF42 G Fspi0_master$I2SSTAT$0$0 = DF45 G Fspi0_master$I2SWCNT$0$0 = DF44 G Fspi0_master$IEN0$0$0 = 00A8 G Fspi0_master$IEN1$0$0 = 00B8 G Fspi0_master$IEN2$0$0 = 009A G Fspi0_master$IOCFG0$0$0 = DF31 G Fspi0_master$IOCFG1$0$0 = DF30 G Fspi0_master$IOCFG2$0$0 = DF2F G Fspi0_master$IP0$0$0 = 00A9 G Fspi0_master$IP1$0$0 = 00B9 G Fspi0_master$IRCON$0$0 = 00C0 G Fspi0_master$IRCON2$0$0 = 00E8 G Fspi0_master$LQI$0$0 = DF39 G Fspi0_master$MARCSTATE$0$0 = DF3B G Fspi0_master$MCSM0$0$0 = DF14 G Fspi0_master$MCSM1$0$0 = DF13 G Fspi0_master$MCSM2$0$0 = DF12 G Fspi0_master$MDMCFG0$0$0 = DF10 G Fspi0_master$MDMCFG1$0$0 = DF0F G Fspi0_master$MDMCFG2$0$0 = DF0E G Fspi0_master$MDMCFG3$0$0 = DF0D G Fspi0_master$MDMCFG4$0$0 = DF0C G Fspi0_master$MEMCTR$0$0 = 00C7 G Fspi0_master$MPAGE$0$0 = 0093 G Fspi0_master$OV$0$0 = 00D2 G Fspi0_master$OVFIM$0$0 = 00DE G Fspi0_master$P$0$0 = 00D0 G Fspi0_master$P0$0$0 = 0080 G Fspi0_master$P0DIR$0$0 = 00FD G Fspi0_master$P0IE$0$0 = 00BD G Fspi0_master$P0IF$0$0 = 00C5 G Fspi0_master$P0IFG$0$0 = 0089 G Fspi0_master$P0INP$0$0 = 008F G Fspi0_master$P0SEL$0$0 = 00F3 G Fspi0_master$P0_0$0$0 = 0080 G Fspi0_master$P0_1$0$0 = 0081 G Fspi0_master$P0_2$0$0 = 0082 G Fspi0_master$P0_3$0$0 = 0083 G Fspi0_master$P0_4$0$0 = 0084 G Fspi0_master$P0_5$0$0 = 0085 G Fspi0_master$P0_6$0$0 = 0086 G Fspi0_master$P0_7$0$0 = 0087 G Fspi0_master$P1$0$0 = 0090 G Fspi0_master$P1DIR$0$0 = 00FE G Fspi0_master$P1IEN$0$0 = 008D G Fspi0_master$P1IF$0$0 = 00EB G Fspi0_master$P1IFG$0$0 = 008A G Fspi0_master$P1INP$0$0 = 00F6 G Fspi0_master$P1SEL$0$0 = 00F4 G Fspi0_master$P1_0$0$0 = 0090 G Fspi0_master$P1_1$0$0 = 0091 G Fspi0_master$P1_2$0$0 = 0092 G Fspi0_master$P1_3$0$0 = 0093 G Fspi0_master$P1_4$0$0 = 0094 G Fspi0_master$P1_5$0$0 = 0095 G Fspi0_master$P1_6$0$0 = 0096 G Fspi0_master$P1_7$0$0 = 0097 G Fspi0_master$P2$0$0 = 00A0 G Fspi0_master$P2DIR$0$0 = 00FF G Fspi0_master$P2IF$0$0 = 00E8 G Fspi0_master$P2IFG$0$0 = 008B G Fspi0_master$P2INP$0$0 = 00F7 G Fspi0_master$P2SEL$0$0 = 00F5 G Fspi0_master$P2_0$0$0 = 00A0 G Fspi0_master$P2_1$0$0 = 00A1 G Fspi0_master$P2_2$0$0 = 00A2 G Fspi0_master$P2_3$0$0 = 00A3 G Fspi0_master$P2_4$0$0 = 00A4 G Fspi0_master$P2_5$0$0 = 00A5 G Fspi0_master$P2_6$0$0 = 00A6 G Fspi0_master$P2_7$0$0 = 00A7 G Fspi0_master$PARTNUM$0$0 = DF36 G Fspi0_master$PA_TABLE0$0$0 = DF2E G Fspi0_master$PCON$0$0 = 0087 G Fspi0_master$PERCFG$0$0 = 00F1 G Fspi0_master$PICTL$0$0 = 008C G Fspi0_master$PKTCTRL0$0$0 = DF04 G Fspi0_master$PKTCTRL1$0$0 = DF03 G Fspi0_master$PKTLEN$0$0 = DF02 G Fspi0_master$PKTSTATUS$0$0 = DF3C G Fspi0_master$PSW$0$0 = 00D0 G Fspi0_master$RFD$0$0 = 00D9 G Fspi0_master$RFIF$0$0 = 00E9 G Fspi0_master$RFIM$0$0 = 0091 G Fspi0_master$RFST$0$0 = 00E1 G Fspi0_master$RFTXRXIE$0$0 = 00A8 G Fspi0_master$RFTXRXIF$0$0 = 0089 G Fspi0_master$RNDH$0$0 = 00BD G Fspi0_master$RNDL$0$0 = 00BC G Fspi0_master$RS0$0$0 = 00D3 G Fspi0_master$RS1$0$0 = 00D4 G Fspi0_master$RSSI$0$0 = DF3A G Fspi0_master$S0CON$0$0 = 0098 G Fspi0_master$S1CON$0$0 = 009B G Fspi0_master$SLEEP$0$0 = 00BE G Fspi0_master$SP$0$0 = 0081 G Fspi0_master$STIE$0$0 = 00AD G Fspi0_master$STIF$0$0 = 00C7 G Fspi0_master$SYNC0$0$0 = DF01 G Fspi0_master$SYNC1$0$0 = DF00 G Fspi0_master$T1CC0$0$0 = FFFFDBDA G Fspi0_master$T1CC0H$0$0 = 00DB G Fspi0_master$T1CC0L$0$0 = 00DA G Fspi0_master$T1CC1$0$0 = FFFFDDDC G Fspi0_master$T1CC1H$0$0 = 00DD G Fspi0_master$T1CC1L$0$0 = 00DC G Fspi0_master$T1CC2$0$0 = FFFFDFDE G Fspi0_master$T1CC2H$0$0 = 00DF G Fspi0_master$T1CC2L$0$0 = 00DE G Fspi0_master$T1CCTL0$0$0 = 00E5 G Fspi0_master$T1CCTL1$0$0 = 00E6 G Fspi0_master$T1CCTL2$0$0 = 00E7 G Fspi0_master$T1CNTH$0$0 = 00E3 G Fspi0_master$T1CNTL$0$0 = 00E2 G Fspi0_master$T1CTL$0$0 = 00E4 G Fspi0_master$T1IE$0$0 = 00B9 G Fspi0_master$T1IF$0$0 = 00C1 G Fspi0_master$T2CT$0$0 = 009C G Fspi0_master$T2CTL$0$0 = 009E G Fspi0_master$T2IE$0$0 = 00BA G Fspi0_master$T2IF$0$0 = 00C2 G Fspi0_master$T2PR$0$0 = 009D G Fspi0_master$T3CC0$0$0 = 00CD G Fspi0_master$T3CC1$0$0 = 00CF G Fspi0_master$T3CCTL0$0$0 = 00CC G Fspi0_master$T3CCTL1$0$0 = 00CE G Fspi0_master$T3CH0IF$0$0 = 00D9 G Fspi0_master$T3CH1IF$0$0 = 00DA G Fspi0_master$T3CNT$0$0 = 00CA G Fspi0_master$T3CTL$0$0 = 00CB G Fspi0_master$T3IE$0$0 = 00BB G Fspi0_master$T3IF$0$0 = 00C3 G Fspi0_master$T3OVFIF$0$0 = 00D8 G Fspi0_master$T4CC0$0$0 = 00ED G Fspi0_master$T4CC1$0$0 = 00EF G Fspi0_master$T4CCTL0$0$0 = 00EC G Fspi0_master$T4CCTL1$0$0 = 00EE G Fspi0_master$T4CH0IF$0$0 = 00DC G Fspi0_master$T4CH1IF$0$0 = 00DD G Fspi0_master$T4CNT$0$0 = 00EA G Fspi0_master$T4CTL$0$0 = 00EB G Fspi0_master$T4IE$0$0 = 00BC G Fspi0_master$T4IF$0$0 = 00C4 G Fspi0_master$T4OVFIF$0$0 = 00DB G Fspi0_master$TCON$0$0 = 0088 G Fspi0_master$TEST0$0$0 = DF25 G Fspi0_master$TEST1$0$0 = DF24 G Fspi0_master$TEST2$0$0 = DF23 G Fspi0_master$TIMIF$0$0 = 00D8 G Fspi0_master$U0BAUD$0$0 = 00C2 G Fspi0_master$U0CSR$0$0 = 0086 G Fspi0_master$U0DBUF$0$0 = 00C1 G Fspi0_master$U0GCR$0$0 = 00C5 G Fspi0_master$U0UCR$0$0 = 00C4 G Fspi0_master$U1ACTIVE$0$0 = 00F8 G Fspi0_master$U1BAUD$0$0 = 00FA G Fspi0_master$U1CSR$0$0 = 00F8 G Fspi0_master$U1DBUF$0$0 = 00F9 G Fspi0_master$U1ERR$0$0 = 00FB G Fspi0_master$U1FE$0$0 = 00FC G Fspi0_master$U1GCR$0$0 = 00FC G Fspi0_master$U1MODE$0$0 = 00FF G Fspi0_master$U1RE$0$0 = 00FE G Fspi0_master$U1RX_BYTE$0$0 = 00FA G Fspi0_master$U1SLAVE$0$0 = 00FD G Fspi0_master$U1TX_BYTE$0$0 = 00F9 G Fspi0_master$U1UCR$0$0 = 00FB G Fspi0_master$URX0IE$0$0 = 00AA G Fspi0_master$URX0IF$0$0 = 008B G Fspi0_master$URX1IE$0$0 = 00AB G Fspi0_master$URX1IF$0$0 = 008F G Fspi0_master$USBADDR$0$0 = DE00 G Fspi0_master$USBCIE$0$0 = DE0B G Fspi0_master$USBCIF$0$0 = DE06 G Fspi0_master$USBCNTH$0$0 = DE17 G Fspi0_master$USBCNTL$0$0 = DE16 G Fspi0_master$USBCSIH$0$0 = DE12 G Fspi0_master$USBCSIL$0$0 = DE11 G Fspi0_master$USBCSOH$0$0 = DE15 G Fspi0_master$USBCSOL$0$0 = DE14 G Fspi0_master$USBF0$0$0 = DE20 G Fspi0_master$USBF1$0$0 = DE22 G Fspi0_master$USBF2$0$0 = DE24 G Fspi0_master$USBF3$0$0 = DE26 G Fspi0_master$USBF4$0$0 = DE28 G Fspi0_master$USBF5$0$0 = DE2A G Fspi0_master$USBFRMH$0$0 = DE0D G Fspi0_master$USBFRML$0$0 = DE0C G Fspi0_master$USBIIE$0$0 = DE07 G Fspi0_master$USBIIF$0$0 = DE02 G Fspi0_master$USBINDEX$0$0 = DE0E G Fspi0_master$USBMAXI$0$0 = DE10 G Fspi0_master$USBMAXO$0$0 = DE13 G Fspi0_master$USBOIE$0$0 = DE09 G Fspi0_master$USBOIF$0$0 = DE04 G Fspi0_master$USBPOW$0$0 = DE01 G Fspi0_master$UTX0IF$0$0 = 00E9 G Fspi0_master$UTX1IF$0$0 = 00EA G Fspi0_master$VCO_VC_DAC$0$0 = DF3D G Fspi0_master$VERSION$0$0 = DF37 G Fspi0_master$WDCTL$0$0 = 00C9 G Fspi0_master$WDTIF$0$0 = 00EC G Fspi0_master$WORCTRL$0$0 = 00A2 G Fspi0_master$WOREVT0$0$0 = 00A3 G Fspi0_master$WOREVT1$0$0 = 00A4 G Fspi0_master$WORIRQ$0$0 = 00A1 G Fspi0_master$WORTIME0$0$0 = 00A5 G Fspi0_master$WORTIME1$0$0 = 00A6 G Fspi0_master$_IEN06$0$0 = 00AE G Fspi0_master$_IEN16$0$0 = 00BE G Fspi0_master$_IEN17$0$0 = 00BF G Fspi0_master$_IRCON25$0$0 = 00ED G Fspi0_master$_IRCON26$0$0 = 00EE G Fspi0_master$_IRCON27$0$0 = 00EF G Fspi0_master$_IRCON6$0$0 = 00C6 G Fspi0_master$_SOCON2$0$0 = 009A G Fspi0_master$_SOCON3$0$0 = 009B G Fspi0_master$_SOCON4$0$0 = 009C G Fspi0_master$_SOCON5$0$0 = 009D G Fspi0_master$_SOCON6$0$0 = 009E G Fspi0_master$_SOCON7$0$0 = 009F G Fspi0_master$_TCON_0$0$0 = 0088 G Fspi0_master$_TCON_2$0$0 = 008A G Fspi0_master$_TCON_4$0$0 = 008C G Fspi0_master$_TCON_6$0$0 = 008E G Fspi0_master$_TIMIF7$0$0 = 00DF G 5 Fspi0_master$bytesLeft$0$0 = 0004 GR 5 Fspi0_master$rxPointer$0$0 = 0002 GR 5 Fspi0_master$txPointer$0$0 = 0000 GR 17 G$ISR_URX0$0$0 = 0194 GR 17 G$spi0MasterBusy$0$0 = 0124 GR 17 G$spi0MasterBytesLeft$0$0 = 0127 GR 17 G$spi0MasterInit$0$0 = 0000 GR 17 G$spi0MasterReceiveByte$0$0 = 018E GR 17 G$spi0MasterSendByte$0$0 = 0167 GR 17 G$spi0MasterSetBitOrder$0$0 = 0119 GR 17 G$spi0MasterSetClockPhase$0$0 = 010E GR 17 G$spi0MasterSetClockPolarity$0$0 = 0103 GR 17 G$spi0MasterSetFrequency$0$0 = 0014 GR 17 G$spi0MasterTransfer$0$0 = 0138 GR IE 00A8 IE.0 00A8 IE.1 00A9 IE.2 00AA IE.3 00AB IE.4 00AC IE.5 00AD IE.7 00AF IE0 0089 IE1 008B INT0 00B2 INT1 00B3 IP 00B8 IP.0 00B8 IP.1 00B9 IP.2 00BA IP.3 00BB IP.4 00BC IP.5 00BD IT0 0088 IT1 008A B Lspi0MasterSendByte$byte$1$1 = 0000 GR B Lspi0MasterSendByte$rxByte$1$1 = 0001 GR 9 Lspi0MasterSetBitOrder$bitOrder$1$1 = 0002 GR 9 Lspi0MasterSetClockPhase$phase$1$1 = 0001 GR 9 Lspi0MasterSetClockPolarity$polarity$1$1 = 0000 GR 5 Lspi0MasterSetFrequency$sloc0$1$0 = 0006 GR A Lspi0MasterTransfer$rxBuffer$1$1 = 0000 GR A Lspi0MasterTransfer$size$1$1 = 0002 GR OV 00D2 P 00D0 P0 0080 P0.0 0080 P0.1 0081 P0.2 0082 P0.3 0083 P0.4 0084 P0.5 0085 P0.6 0086 P0.7 0087 P1 0090 P1.0 0090 P1.1 0091 P1.2 0092 P1.3 0093 P1.4 0094 P1.5 0095 P1.6 0096 P1.7 0097 P2 00A0 P2.0 00A0 P2.1 00A1 P2.2 00A2 P2.3 00A3 P2.4 00A4 P2.5 00A5 P2.6 00A6 P2.7 00A7 P3 00B0 P3.0 00B0 P3.1 00B1 P3.2 00B2 P3.3 00B3 P3.4 00B4 P3.5 00B5 P3.6 00B6 P3.7 00B7 PCON 0087 PS 00BC PSW 00D0 PSW.0 00D0 PSW.1 00D1 PSW.2 00D2 PSW.3 00D3 PSW.4 00D4 PSW.5 00D5 PSW.6 00D6 PSW.7 00D7 PT0 00B9 PT1 00BB PT2 00BD PX0 00B8 PX1 00BA RB8 009A RCAP2H 00CB RCAP2L 00CA RCLK 00CD REN 009C RI 0098 RS0 00D3 RS1 00D4 RXD 00B0 SBUF 0099 SCON 0098 SCON.0 0098 SCON.1 0099 SCON.2 009A SCON.3 009B SCON.4 009C SCON.5 009D SCON.6 009E SCON.7 009F SM0 009F SM1 009E SM2 009D SP 0081 T2CON 00C8 T2CON.0 00C8 T2CON.1 00C9 T2CON.2 00CA T2CON.3 00CB T2CON.4 00CC T2CON.5 00CD T2CON.6 00CE T2CON.7 00CF TB8 009B TCLK 00CC TCON 0088 TCON.0 0088 TCON.1 0089 TCON.2 008A TCON.3 008B TCON.4 008C TCON.5 008D TCON.6 008E TCON.7 008F TF0 008D TF1 008F TF2 00CF TH0 008C TH1 008D TH2 00CD TI 0099 TL0 008A TL1 008B TL2 00CC TMOD 0089 TR0 008C TR1 008E TR2 00CA TXD 00B1 17 XG$ISR_URX0$0$0 = 01DE GR 17 XG$spi0MasterBusy$0$0 = 0126 GR 17 XG$spi0MasterBytesLeft$0$0 = 0137 GR 17 XG$spi0MasterInit$0$0 = 0013 GR 17 XG$spi0MasterReceiveByte$0$0 = 0191 GR 17 XG$spi0MasterSendByte$0$0 = 018B GR 17 XG$spi0MasterSetBitOrder$0$0 = 0123 GR 17 XG$spi0MasterSetClockPhase$0$0 = 0118 GR 17 XG$spi0MasterSetClockPolarity$0$0 = 010D GR 17 XG$spi0MasterSetFrequency$0$0 = 0102 GR 17 XG$spi0MasterTransfer$0$0 = 0166 GR _AC = 00D6 _ACC = 00E0 _ACC_0 = 00E0 _ACC_1 = 00E1 _ACC_2 = 00E2 _ACC_3 = 00E3 _ACC_4 = 00E4 _ACC_5 = 00E5 _ACC_6 = 00E6 _ACC_7 = 00E7 _ADC = FFFFBBBA _ADCCFG = 00F2 _ADCCON1 = 00B4 _ADCCON2 = 00B5 _ADCCON3 = 00B6 _ADCH = 00BB _ADCIE = 00A9 _ADCIF = 008D _ADCL = 00BA _ADDR = DF05 _AGCCTRL0 = DF19 _AGCCTRL1 = DF18 _AGCCTRL2 = DF17 _B = 00F0 _BSCFG = DF16 _B_0 = 00F0 _B_1 = 00F1 _B_2 = 00F2 _B_3 = 00F3 _B_4 = 00F4 _B_5 = 00F5 _B_6 = 00F6 _B_7 = 00F7 _CHANNR = DF06 _CLKCON = 00C6 _CY = 00D7 _DEVIATN = DF11 _DMA0CFG = FFFFD5D4 _DMA0CFGH = 00D5 _DMA0CFGL = 00D4 _DMA1CFG = FFFFD3D2 _DMA1CFGH = 00D3 _DMA1CFGL = 00D2 _DMAARM = 00D6 _DMAIE = 00B8 _DMAIF = 00C0 _DMAIRQ = 00D1 _DMAREQ = 00D7 _DPH0 = 0083 _DPH1 = 0085 _DPL0 = 0082 _DPL1 = 0084 _DPS = 0092 _EA = 00AF _ENCCS = 00B3 _ENCDI = 00B1 _ENCDO = 00B2 _ENCIE = 00AC _ENCIF_0 = 0098 _ENCIF_1 = 0099 _ENDIAN = 0095 _F0 = 00D5 _F1 = 00D1 _FADDR = FFFFADAC _FADDRH = 00AD _FADDRL = 00AC _FCTL = 00AE _FOCCFG = DF15 _FREND0 = DF1B _FREND1 = DF1A _FREQ0 = DF0B _FREQ1 = DF0A _FREQ2 = DF09 _FREQEST = DF38 _FSCAL0 = DF1F _FSCAL1 = DF1E _FSCAL2 = DF1D _FSCAL3 = DF1C _FSCTRL0 = DF08 _FSCTRL1 = DF07 _FWDATA = 00AF _FWT = 00AB _I2SCFG0 = DF40 _I2SCFG1 = DF41 _I2SCLKF0 = DF46 _I2SCLKF1 = DF47 _I2SCLKF2 = DF48 _I2SDATH = DF43 _I2SDATL = DF42 _I2SSTAT = DF45 _I2SWCNT = DF44 _IEN0 = 00A8 _IEN1 = 00B8 _IEN2 = 009A _IOCFG0 = DF31 _IOCFG1 = DF30 _IOCFG2 = DF2F _IP0 = 00A9 _IP1 = 00B9 _IRCON = 00C0 _IRCON2 = 00E8 17 _ISR_URX0 0194 GR _LQI = DF39 _MARCSTATE = DF3B _MCSM0 = DF14 _MCSM1 = DF13 _MCSM2 = DF12 _MDMCFG0 = DF10 _MDMCFG1 = DF0F _MDMCFG2 = DF0E _MDMCFG3 = DF0D _MDMCFG4 = DF0C _MEMCTR = 00C7 _MPAGE = 0093 _OV = 00D2 _OVFIM = 00DE _P = 00D0 _P0 = 0080 _P0DIR = 00FD _P0IE = 00BD _P0IF = 00C5 _P0IFG = 0089 _P0INP = 008F _P0SEL = 00F3 _P0_0 = 0080 _P0_1 = 0081 _P0_2 = 0082 _P0_3 = 0083 _P0_4 = 0084 _P0_5 = 0085 _P0_6 = 0086 _P0_7 = 0087 _P1 = 0090 _P1DIR = 00FE _P1IEN = 008D _P1IF = 00EB _P1IFG = 008A _P1INP = 00F6 _P1SEL = 00F4 _P1_0 = 0090 _P1_1 = 0091 _P1_2 = 0092 _P1_3 = 0093 _P1_4 = 0094 _P1_5 = 0095 _P1_6 = 0096 _P1_7 = 0097 _P2 = 00A0 _P2DIR = 00FF _P2IF = 00E8 _P2IFG = 008B _P2INP = 00F7 _P2SEL = 00F5 _P2_0 = 00A0 _P2_1 = 00A1 _P2_2 = 00A2 _P2_3 = 00A3 _P2_4 = 00A4 _P2_5 = 00A5 _P2_6 = 00A6 _P2_7 = 00A7 _PARTNUM = DF36 _PA_TABLE0 = DF2E _PCON = 0087 _PERCFG = 00F1 _PICTL = 008C _PKTCTRL0 = DF04 _PKTCTRL1 = DF03 _PKTLEN = DF02 _PKTSTATUS = DF3C _PSW = 00D0 _RFD = 00D9 _RFIF = 00E9 _RFIM = 0091 _RFST = 00E1 _RFTXRXIE = 00A8 _RFTXRXIF = 0089 _RNDH = 00BD _RNDL = 00BC _RS0 = 00D3 _RS1 = 00D4 _RSSI = DF3A _S0CON = 0098 _S1CON = 009B _SLEEP = 00BE _SP = 0081 _STIE = 00AD _STIF = 00C7 _SYNC0 = DF01 _SYNC1 = DF00 _T1CC0 = FFFFDBDA _T1CC0H = 00DB _T1CC0L = 00DA _T1CC1 = FFFFDDDC _T1CC1H = 00DD _T1CC1L = 00DC _T1CC2 = FFFFDFDE _T1CC2H = 00DF _T1CC2L = 00DE _T1CCTL0 = 00E5 _T1CCTL1 = 00E6 _T1CCTL2 = 00E7 _T1CNTH = 00E3 _T1CNTL = 00E2 _T1CTL = 00E4 _T1IE = 00B9 _T1IF = 00C1 _T2CT = 009C _T2CTL = 009E _T2IE = 00BA _T2IF = 00C2 _T2PR = 009D _T3CC0 = 00CD _T3CC1 = 00CF _T3CCTL0 = 00CC _T3CCTL1 = 00CE _T3CH0IF = 00D9 _T3CH1IF = 00DA _T3CNT = 00CA _T3CTL = 00CB _T3IE = 00BB _T3IF = 00C3 _T3OVFIF = 00D8 _T4CC0 = 00ED _T4CC1 = 00EF _T4CCTL0 = 00EC _T4CCTL1 = 00EE _T4CH0IF = 00DC _T4CH1IF = 00DD _T4CNT = 00EA _T4CTL = 00EB _T4IE = 00BC _T4IF = 00C4 _T4OVFIF = 00DB _TCON = 0088 _TEST0 = DF25 _TEST1 = DF24 _TEST2 = DF23 _TIMIF = 00D8 _U0BAUD = 00C2 _U0CSR = 0086 _U0DBUF = 00C1 _U0GCR = 00C5 _U0UCR = 00C4 _U1ACTIVE = 00F8 _U1BAUD = 00FA _U1CSR = 00F8 _U1DBUF = 00F9 _U1ERR = 00FB _U1FE = 00FC _U1GCR = 00FC _U1MODE = 00FF _U1RE = 00FE _U1RX_BYTE = 00FA _U1SLAVE = 00FD _U1TX_BYTE = 00F9 _U1UCR = 00FB _URX0IE = 00AA _URX0IF = 008B _URX1IE = 00AB _URX1IF = 008F _USBADDR = DE00 _USBCIE = DE0B _USBCIF = DE06 _USBCNTH = DE17 _USBCNTL = DE16 _USBCSIH = DE12 _USBCSIL = DE11 _USBCSOH = DE15 _USBCSOL = DE14 _USBF0 = DE20 _USBF1 = DE22 _USBF2 = DE24 _USBF3 = DE26 _USBF4 = DE28 _USBF5 = DE2A _USBFRMH = DE0D _USBFRML = DE0C _USBIIE = DE07 _USBIIF = DE02 _USBINDEX = DE0E _USBMAXI = DE10 _USBMAXO = DE13 _USBOIE = DE09 _USBOIF = DE04 _USBPOW = DE01 _UTX0IF = 00E9 _UTX1IF = 00EA _VCO_VC_DAC = DF3D _VERSION = DF37 _WDCTL = 00C9 _WDTIF = 00EC _WORCTRL = 00A2 _WOREVT0 = 00A3 _WOREVT1 = 00A4 _WORIRQ = 00A1 _WORTIME0 = 00A5 _WORTIME1 = 00A6 __IEN06 = 00AE __IEN16 = 00BE __IEN17 = 00BF __IRCON25 = 00ED __IRCON26 = 00EE __IRCON27 = 00EF __IRCON6 = 00C6 __SOCON2 = 009A __SOCON3 = 009B __SOCON4 = 009C __SOCON5 = 009D __SOCON6 = 009E __SOCON7 = 009F __TCON_0 = 0088 __TCON_2 = 008A __TCON_4 = 008C __TCON_6 = 008E __TIMIF7 = 00DF __divulong **** GX __divulong_PARM_2 **** GX __mullong **** GX __mullong_PARM_2 **** GX 5 _bytesLeft 0004 R 5 _rxPointer 0002 R 17 _spi0MasterBusy 0124 GR 17 _spi0MasterBytesLeft 0127 GR 17 _spi0MasterInit 0000 GR 17 _spi0MasterReceiveByte 018E GR 17 _spi0MasterSendByte 0167 GR B _spi0MasterSendByte_byte_1_1 0000 R B _spi0MasterSendByte_rxByte_1_1 0001 R 17 _spi0MasterSetBitOrder 0119 GR 9 _spi0MasterSetBitOrder_PARM_1 0002 GR 17 _spi0MasterSetClockPhase 010E GR 9 _spi0MasterSetClockPhase_PARM_1 0001 GR 17 _spi0MasterSetClockPolarity 0103 GR 9 _spi0MasterSetClockPolarity_PARM_1 0000 GR 17 _spi0MasterSetFrequency 0014 GR 5 _spi0MasterSetFrequency_sloc0_1_0 0006 R 17 _spi0MasterTransfer 0138 GR A _spi0MasterTransfer_PARM_2 0000 GR A _spi0MasterTransfer_PARM_3 0002 GR 5 _txPointer 0000 R a 00E0 a.0 00E0 a.1 00E1 a.2 00E2 a.3 00E3 a.4 00E4 a.5 00E5 a.6 00E6 a.7 00E7 ac 00D6 acc 00E0 acc.0 00E0 acc.1 00E1 acc.2 00E2 acc.3 00E3 acc.4 00E4 acc.5 00E5 acc.6 00E6 acc.7 00E7 ar0 = 0000 ar1 = 0001 ar2 = 0002 ar3 = 0003 ar4 = 0004 ar5 = 0005 ar6 = 0006 ar7 = 0007 b 00F0 b.0 00F0 b.1 00F1 b.2 00F2 b.3 00F3 b.4 00F4 b.5 00F5 b.6 00F6 b.7 00F7 cprl2 00C8 ct2 00C9 cy 00D7 dph 0083 dpl 0082 ea 00AF es 00AC et0 00A9 et1 00AB et2 00AD ex0 00A8 ex1 00AA exen2 00CB exf2 00CE f0 00D5 ie 00A8 ie.0 00A8 ie.1 00A9 ie.2 00AA ie.3 00AB ie.4 00AC ie.5 00AD ie.7 00AF ie0 0089 ie1 008B int0 00B2 int1 00B3 ip 00B8 ip.0 00B8 ip.1 00B9 ip.2 00BA ip.3 00BB ip.4 00BC ip.5 00BD it0 0088 it1 008A ov 00D2 p 00D0 p0 0080 p0.0 0080 p0.1 0081 p0.2 0082 p0.3 0083 p0.4 0084 p0.5 0085 p0.6 0086 p0.7 0087 p1 0090 p1.0 0090 p1.1 0091 p1.2 0092 p1.3 0093 p1.4 0094 p1.5 0095 p1.6 0096 p1.7 0097 p2 00A0 p2.0 00A0 p2.1 00A1 p2.2 00A2 p2.3 00A3 p2.4 00A4 p2.5 00A5 p2.6 00A6 p2.7 00A7 p3 00B0 p3.0 00B0 p3.1 00B1 p3.2 00B2 p3.3 00B3 p3.4 00B4 p3.5 00B5 p3.6 00B6 p3.7 00B7 pcon 0087 ps 00BC psw 00D0 psw.0 00D0 psw.1 00D1 psw.2 00D2 psw.3 00D3 psw.4 00D4 psw.5 00D5 psw.6 00D6 psw.7 00D7 pt0 00B9 pt1 00BB pt2 00BD px0 00B8 px1 00BA rb8 009A rcap2h 00CB rcap2l 00CA rclk 00CD ren 009C ri 0098 rs0 00D3 rs1 00D4 rxd 00B0 sbuf 0099 scon 0098 scon.0 0098 scon.1 0099 scon.2 009A scon.3 009B scon.4 009C scon.5 009D scon.6 009E scon.7 009F sm0 009F sm1 009E sm2 009D sp 0081 t2con 00C8 t2con.0 00C8 t2con.1 00C9 t2con.2 00CA t2con.3 00CB t2con.4 00CC t2con.5 00CD t2con.6 00CE t2con.7 00CF tb8 009B tclk 00CC tcon 0088 tcon.0 0088 tcon.1 0089 tcon.2 008A tcon.3 008B tcon.4 008C tcon.5 008D tcon.6 008E tcon.7 008F tf0 008D tf1 008F tf2 00CF th0 008C th1 008D th2 00CD ti 0099 tl0 008A tl1 008B tl2 00CC tmod 0089 tr0 008C tr1 008E tr2 00CA txd 00B1 ASxxxx Assembler V02.00 + NoICE + SDCC mods + Flat24 (Intel 8051), page 2. Area Table 0 _CODE size 0 flags 0 1 RSEG size 0 flags 8 2 RSEG0 size 0 flags 8 3 RSEG1 size 0 flags 8 4 REG_BANK_0 size 8 flags 4 5 DSEG size A flags 0 6 OSEG size 0 flags 4 7 ISEG size 0 flags 0 8 IABS size 0 flags 8 9 BSEG size 3 flags 80 A PSEG size 4 flags 50 B XSEG size 2 flags 40 C XABS size 0 flags 48 D XISEG size 0 flags 40 E HOME size 0 flags 20 F GSINIT0 size 0 flags 20 10 GSINIT1 size 0 flags 20 11 GSINIT2 size 0 flags 20 12 GSINIT3 size 0 flags 20 13 GSINIT4 size 0 flags 20 14 GSINIT5 size 0 flags 20 15 GSINIT size F flags 20 16 GSFINAL size 0 flags 20 17 CSEG size 1DF flags 20 18 CONST size 0 flags 20 19 XINIT size 0 flags 20 1A CABS size 0 flags 28