M:radio_registers F:G$radioRegistersInit$0$0({2}DF,SV:S),Z,0,0,0,0,0 F:G$radioCrcPassed$0$0({2}DF,SB0$1:U),Z,0,0,0,0,0 F:G$radioLqi$0$0({2}DF,SC:U),Z,0,0,0,0,0 F:G$radioRssi$0$0({2}DF,SC:S),Z,0,0,0,0,0 T:Fradio_registers$__00010000[({0}S:S$SRCADDRH$0$0({1}SC:U),Z,0,0)({1}S:S$SRCADDRL$0$0({1}SC:U),Z,0,0)({2}S:S$DESTADDRH$0$0({1}SC:U),Z,0,0)({3}S:S$DESTADDRL$0$0({1}SC:U),Z,0,0)({4}S:S$VLEN_LENH$0$0({1}SC:U),Z,0,0)({5}S:S$LENL$0$0({1}SC:U),Z,0,0)({6}S:S$DC6$0$0({1}SC:U),Z,0,0)({7}S:S$DC7$0$0({1}SC:U),Z,0,0)] S:Fradio_registers$SYNC1$0$0({1}SC:U),F,0,0 S:Fradio_registers$SYNC0$0$0({1}SC:U),F,0,0 S:Fradio_registers$PKTLEN$0$0({1}SC:U),F,0,0 S:Fradio_registers$PKTCTRL1$0$0({1}SC:U),F,0,0 S:Fradio_registers$PKTCTRL0$0$0({1}SC:U),F,0,0 S:Fradio_registers$ADDR$0$0({1}SC:U),F,0,0 S:Fradio_registers$CHANNR$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCTRL1$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCTRL0$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREQ2$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREQ1$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREQ0$0$0({1}SC:U),F,0,0 S:Fradio_registers$MDMCFG4$0$0({1}SC:U),F,0,0 S:Fradio_registers$MDMCFG3$0$0({1}SC:U),F,0,0 S:Fradio_registers$MDMCFG2$0$0({1}SC:U),F,0,0 S:Fradio_registers$MDMCFG1$0$0({1}SC:U),F,0,0 S:Fradio_registers$MDMCFG0$0$0({1}SC:U),F,0,0 S:Fradio_registers$DEVIATN$0$0({1}SC:U),F,0,0 S:Fradio_registers$MCSM2$0$0({1}SC:U),F,0,0 S:Fradio_registers$MCSM1$0$0({1}SC:U),F,0,0 S:Fradio_registers$MCSM0$0$0({1}SC:U),F,0,0 S:Fradio_registers$FOCCFG$0$0({1}SC:U),F,0,0 S:Fradio_registers$BSCFG$0$0({1}SC:U),F,0,0 S:Fradio_registers$AGCCTRL2$0$0({1}SC:U),F,0,0 S:Fradio_registers$AGCCTRL1$0$0({1}SC:U),F,0,0 S:Fradio_registers$AGCCTRL0$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREND1$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREND0$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCAL3$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCAL2$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCAL1$0$0({1}SC:U),F,0,0 S:Fradio_registers$FSCAL0$0$0({1}SC:U),F,0,0 S:Fradio_registers$TEST2$0$0({1}SC:U),F,0,0 S:Fradio_registers$TEST1$0$0({1}SC:U),F,0,0 S:Fradio_registers$TEST0$0$0({1}SC:U),F,0,0 S:Fradio_registers$PA_TABLE0$0$0({1}SC:U),F,0,0 S:Fradio_registers$IOCFG2$0$0({1}SC:U),F,0,0 S:Fradio_registers$IOCFG1$0$0({1}SC:U),F,0,0 S:Fradio_registers$IOCFG0$0$0({1}SC:U),F,0,0 S:Fradio_registers$PARTNUM$0$0({1}SC:U),F,0,0 S:Fradio_registers$VERSION$0$0({1}SC:U),F,0,0 S:Fradio_registers$FREQEST$0$0({1}SC:U),F,0,0 S:Fradio_registers$LQI$0$0({1}SC:U),F,0,0 S:Fradio_registers$RSSI$0$0({1}SC:U),F,0,0 S:Fradio_registers$MARCSTATE$0$0({1}SC:U),F,0,0 S:Fradio_registers$PKTSTATUS$0$0({1}SC:U),F,0,0 S:Fradio_registers$VCO_VC_DAC$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SCFG0$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SCFG1$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SDATL$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SDATH$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SWCNT$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SSTAT$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SCLKF0$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SCLKF1$0$0({1}SC:U),F,0,0 S:Fradio_registers$I2SCLKF2$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBADDR$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBPOW$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBIIF$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBOIF$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCIF$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBIIE$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBOIE$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCIE$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBFRML$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBFRMH$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBINDEX$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBMAXI$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCSIL$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCSIH$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBMAXO$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCSOL$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCSOH$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCNTL$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBCNTH$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF0$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF1$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF2$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF3$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF4$0$0({1}SC:U),F,0,0 S:Fradio_registers$USBF5$0$0({1}SC:U),F,0,0 S:Fradio_registers$P0$0$0({1}SC:U),I,0,0 S:Fradio_registers$SP$0$0({1}SC:U),I,0,0 S:Fradio_registers$DPL0$0$0({1}SC:U),I,0,0 S:Fradio_registers$DPH0$0$0({1}SC:U),I,0,0 S:Fradio_registers$DPL1$0$0({1}SC:U),I,0,0 S:Fradio_registers$DPH1$0$0({1}SC:U),I,0,0 S:Fradio_registers$U0CSR$0$0({1}SC:U),I,0,0 S:Fradio_registers$PCON$0$0({1}SC:U),I,0,0 S:Fradio_registers$TCON$0$0({1}SC:U),I,0,0 S:Fradio_registers$P0IFG$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1IFG$0$0({1}SC:U),I,0,0 S:Fradio_registers$P2IFG$0$0({1}SC:U),I,0,0 S:Fradio_registers$PICTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1IEN$0$0({1}SC:U),I,0,0 S:Fradio_registers$P0INP$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1$0$0({1}SC:U),I,0,0 S:Fradio_registers$RFIM$0$0({1}SC:U),I,0,0 S:Fradio_registers$DPS$0$0({1}SC:U),I,0,0 S:Fradio_registers$MPAGE$0$0({1}SC:U),I,0,0 S:Fradio_registers$ENDIAN$0$0({1}SC:U),I,0,0 S:Fradio_registers$S0CON$0$0({1}SC:U),I,0,0 S:Fradio_registers$IEN2$0$0({1}SC:U),I,0,0 S:Fradio_registers$S1CON$0$0({1}SC:U),I,0,0 S:Fradio_registers$T2CT$0$0({1}SC:U),I,0,0 S:Fradio_registers$T2PR$0$0({1}SC:U),I,0,0 S:Fradio_registers$T2CTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$P2$0$0({1}SC:U),I,0,0 S:Fradio_registers$WORIRQ$0$0({1}SC:U),I,0,0 S:Fradio_registers$WORCTRL$0$0({1}SC:U),I,0,0 S:Fradio_registers$WOREVT0$0$0({1}SC:U),I,0,0 S:Fradio_registers$WOREVT1$0$0({1}SC:U),I,0,0 S:Fradio_registers$WORTIME0$0$0({1}SC:U),I,0,0 S:Fradio_registers$WORTIME1$0$0({1}SC:U),I,0,0 S:Fradio_registers$IEN0$0$0({1}SC:U),I,0,0 S:Fradio_registers$IP0$0$0({1}SC:U),I,0,0 S:Fradio_registers$FWT$0$0({1}SC:U),I,0,0 S:Fradio_registers$FADDRL$0$0({1}SC:U),I,0,0 S:Fradio_registers$FADDRH$0$0({1}SC:U),I,0,0 S:Fradio_registers$FCTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$FWDATA$0$0({1}SC:U),I,0,0 S:Fradio_registers$ENCDI$0$0({1}SC:U),I,0,0 S:Fradio_registers$ENCDO$0$0({1}SC:U),I,0,0 S:Fradio_registers$ENCCS$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCCON1$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCCON2$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCCON3$0$0({1}SC:U),I,0,0 S:Fradio_registers$IEN1$0$0({1}SC:U),I,0,0 S:Fradio_registers$IP1$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCL$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCH$0$0({1}SC:U),I,0,0 S:Fradio_registers$RNDL$0$0({1}SC:U),I,0,0 S:Fradio_registers$RNDH$0$0({1}SC:U),I,0,0 S:Fradio_registers$SLEEP$0$0({1}SC:U),I,0,0 S:Fradio_registers$IRCON$0$0({1}SC:U),I,0,0 S:Fradio_registers$U0DBUF$0$0({1}SC:U),I,0,0 S:Fradio_registers$U0BAUD$0$0({1}SC:U),I,0,0 S:Fradio_registers$U0UCR$0$0({1}SC:U),I,0,0 S:Fradio_registers$U0GCR$0$0({1}SC:U),I,0,0 S:Fradio_registers$CLKCON$0$0({1}SC:U),I,0,0 S:Fradio_registers$MEMCTR$0$0({1}SC:U),I,0,0 S:Fradio_registers$WDCTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CNT$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CCTL0$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CC0$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CCTL1$0$0({1}SC:U),I,0,0 S:Fradio_registers$T3CC1$0$0({1}SC:U),I,0,0 S:Fradio_registers$PSW$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMAIRQ$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMA1CFGL$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMA1CFGH$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMA0CFGL$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMA0CFGH$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMAARM$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMAREQ$0$0({1}SC:U),I,0,0 S:Fradio_registers$TIMIF$0$0({1}SC:U),I,0,0 S:Fradio_registers$RFD$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC0L$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC0H$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC1L$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC1H$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC2L$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CC2H$0$0({1}SC:U),I,0,0 S:Fradio_registers$ACC$0$0({1}SC:U),I,0,0 S:Fradio_registers$RFST$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CNTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CNTH$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CCTL0$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CCTL1$0$0({1}SC:U),I,0,0 S:Fradio_registers$T1CCTL2$0$0({1}SC:U),I,0,0 S:Fradio_registers$IRCON2$0$0({1}SC:U),I,0,0 S:Fradio_registers$RFIF$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CNT$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CTL$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CCTL0$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CC0$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CCTL1$0$0({1}SC:U),I,0,0 S:Fradio_registers$T4CC1$0$0({1}SC:U),I,0,0 S:Fradio_registers$B$0$0({1}SC:U),I,0,0 S:Fradio_registers$PERCFG$0$0({1}SC:U),I,0,0 S:Fradio_registers$ADCCFG$0$0({1}SC:U),I,0,0 S:Fradio_registers$P0SEL$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1SEL$0$0({1}SC:U),I,0,0 S:Fradio_registers$P2SEL$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1INP$0$0({1}SC:U),I,0,0 S:Fradio_registers$P2INP$0$0({1}SC:U),I,0,0 S:Fradio_registers$U1CSR$0$0({1}SC:U),I,0,0 S:Fradio_registers$U1DBUF$0$0({1}SC:U),I,0,0 S:Fradio_registers$U1BAUD$0$0({1}SC:U),I,0,0 S:Fradio_registers$U1UCR$0$0({1}SC:U),I,0,0 S:Fradio_registers$U1GCR$0$0({1}SC:U),I,0,0 S:Fradio_registers$P0DIR$0$0({1}SC:U),I,0,0 S:Fradio_registers$P1DIR$0$0({1}SC:U),I,0,0 S:Fradio_registers$P2DIR$0$0({1}SC:U),I,0,0 S:Fradio_registers$DMA0CFG$0$0({2}SI:U),I,0,0 S:Fradio_registers$DMA1CFG$0$0({2}SI:U),I,0,0 S:Fradio_registers$FADDR$0$0({2}SI:U),I,0,0 S:Fradio_registers$ADC$0$0({2}SI:U),I,0,0 S:Fradio_registers$T1CC0$0$0({2}SI:U),I,0,0 S:Fradio_registers$T1CC1$0$0({2}SI:U),I,0,0 S:Fradio_registers$T1CC2$0$0({2}SI:U),I,0,0 S:Fradio_registers$P0_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_3$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_5$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0_7$0$0({1}SX:U),J,0,0 S:Fradio_registers$_TCON_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$RFTXRXIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$_TCON_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$URX0IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$_TCON_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$ADCIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$_TCON_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$URX1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_3$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_5$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1_7$0$0({1}SX:U),J,0,0 S:Fradio_registers$ENCIF_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$ENCIF_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON2$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON3$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON4$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON5$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON6$0$0({1}SX:U),J,0,0 S:Fradio_registers$_SOCON7$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_3$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_5$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2_7$0$0({1}SX:U),J,0,0 S:Fradio_registers$RFTXRXIE$0$0({1}SX:U),J,0,0 S:Fradio_registers$ADCIE$0$0({1}SX:U),J,0,0 S:Fradio_registers$URX0IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$URX1IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$ENCIE$0$0({1}SX:U),J,0,0 S:Fradio_registers$STIE$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IEN06$0$0({1}SX:U),J,0,0 S:Fradio_registers$EA$0$0({1}SX:U),J,0,0 S:Fradio_registers$DMAIE$0$0({1}SX:U),J,0,0 S:Fradio_registers$T1IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$T2IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$T3IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$T4IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0IE$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IEN16$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IEN17$0$0({1}SX:U),J,0,0 S:Fradio_registers$DMAIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T2IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T3IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T4IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$P0IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IRCON6$0$0({1}SX:U),J,0,0 S:Fradio_registers$STIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$P$0$0({1}SX:U),J,0,0 S:Fradio_registers$F1$0$0({1}SX:U),J,0,0 S:Fradio_registers$OV$0$0({1}SX:U),J,0,0 S:Fradio_registers$RS0$0$0({1}SX:U),J,0,0 S:Fradio_registers$RS1$0$0({1}SX:U),J,0,0 S:Fradio_registers$F0$0$0({1}SX:U),J,0,0 S:Fradio_registers$AC$0$0({1}SX:U),J,0,0 S:Fradio_registers$CY$0$0({1}SX:U),J,0,0 S:Fradio_registers$T3OVFIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T3CH0IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T3CH1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T4OVFIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T4CH0IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$T4CH1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$OVFIM$0$0({1}SX:U),J,0,0 S:Fradio_registers$_TIMIF7$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_3$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_5$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$ACC_7$0$0({1}SX:U),J,0,0 S:Fradio_registers$P2IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$UTX0IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$UTX1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$P1IF$0$0({1}SX:U),J,0,0 S:Fradio_registers$WDTIF$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IRCON25$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IRCON26$0$0({1}SX:U),J,0,0 S:Fradio_registers$_IRCON27$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_0$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_1$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_2$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_3$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_4$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_5$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_6$0$0({1}SX:U),J,0,0 S:Fradio_registers$B_7$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1ACTIVE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1TX_BYTE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1RX_BYTE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1ERR$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1FE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1SLAVE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1RE$0$0({1}SX:U),J,0,0 S:Fradio_registers$U1MODE$0$0({1}SX:U),J,0,0