9307
gpio 9
Fgpio$I2SCLKF1$0$0
Fgpio$MDMCFG1$0$0
Fgpio$FREQ1$0$0
Fgpio$URX1IF$0$0
Fgpio$P0DIR$0$0
Fgpio$T4CC1$0$0
Fgpio$USBF0$0$0
Fgpio$USBPOW$0$0
Fgpio$I2SCLKF2$0$0
Fgpio$MCSM0$0$0
Fgpio$MDMCFG2$0$0
Fgpio$FREQ2$0$0
Fgpio$UTX0IF$0$0
Fgpio$P1DIR$0$0
Fgpio$P0$0$0
Fgpio$USBF1$0$0
Fgpio$MCSM1$0$0
Fgpio$MDMCFG3$0$0
Fgpio$_IRCON25$0$0
Fgpio$UTX1IF$0$0
Fgpio$OVFIM$0$0
Fgpio$P2DIR$0$0
Fgpio$U0GCR$0$0
Fgpio$P1$0$0
Fgpio$USBF2$0$0
Fgpio$USBINDEX$0$0
Fgpio$MCSM2$0$0
Fgpio$MDMCFG4$0$0
Fgpio$U1ACTIVE$0$0
Fgpio$_IRCON26$0$0
Fgpio$_TCON_0$0$0
Fgpio$U1GCR$0$0
Fgpio$B$0$0
Fgpio$P2$0$0
Fgpio$USBF3$0$0
Fgpio$U1RX_BYTE$0$0
Fgpio$_IRCON27$0$0
Fgpio$S0CON$0$0
Fgpio$SP$0$0
Fgpio$USBF4$0$0
Fgpio$_TCON_2$0$0
Fgpio$P0SEL$0$0
Fgpio$WORIRQ$0$0
Fgpio$S1CON$0$0
Fgpio$USBF5$0$0
Fgpio$USBADDR$0$0
Fgpio$U1TX_BYTE$0$0
Fgpio$OV$0$0
Fgpio$P1SEL$0$0
Fgpio$_TCON_4$0$0
Fgpio$P2SEL$0$0
Fgpio$RFIF$0$0
Fgpio$ACC$0$0
Fgpio$P0INP$0$0
Fgpio$PA_TABLE0$0$0
Fgpio$FOCCFG$0$0
Fgpio$_TCON_6$0$0
Fgpio$ADC$0$0
Fgpio$P1INP$0$0
Fgpio$T1CTL$0$0
Fgpio$P2INP$0$0
Fgpio$FCTL$0$0
Fgpio$FADDRH$0$0
Fgpio$T2CTL$0$0
Fgpio$T3CTL$0$0
Fgpio$DEVIATN$0$0
Fgpio$T4CTL$0$0
Fgpio$T3CNT$0$0
Fgpio$RNDH$0$0
Fgpio$IEN0$0$0
Fgpio$DPH0$0$0
Fgpio$SYNC0$0$0
Fgpio$T4CNT$0$0
Fgpio$IEN1$0$0
Fgpio$FADDRL$0$0
Fgpio$U0CSR$0$0
Fgpio$DPH1$0$0
Fgpio$I2SCFG0$0$0
Fgpio$SYNC1$0$0
Fgpio$P0IE$0$0
Fgpio$U1CSR$0$0
Fgpio$IEN2$0$0
Fgpio$RFIM$0$0
Fgpio$I2SDATH$0$0
Fgpio$I2SCFG1$0$0
Fgpio$U1ERR$0$0
Fgpio$_TIMIF7$0$0
Fgpio$P0IF$0$0
Fgpio$P0_0$0$0
Fgpio$U0UCR$0$0
Fgpio$ENDIAN$0$0
Fgpio$TEST0$0$0
Fgpio$P1IF$0$0
Fgpio$P$0$0
Fgpio$_IRCON6$0$0
Fgpio$P1_0$0$0
Fgpio$P0_1$0$0
Fgpio$U1UCR$0$0
Fgpio$RNDL$0$0
Fgpio$PCON$0$0
Fgpio$DPL0$0$0
Fgpio$USBCSIH$0$0
Fgpio$TEST1$0$0
Fgpio$U1FE$0$0
Fgpio$B_0$0$0
Fgpio$P2IF$0$0
Fgpio$T3CH0IF$0$0
Fgpio$P2_0$0$0
Fgpio$P1_1$0$0
Fgpio$P0_2$0$0
Fgpio$DPL1$0$0
Fgpio$TEST2$0$0
Fgpio$B_1$0$0
Fgpio$T4CH0IF$0$0
Fgpio$T3CH1IF$0$0
Fgpio$P2_1$0$0
Fgpio$P1_2$0$0
Fgpio$P0_3$0$0
Fgpio$DMAARM$0$0
Fgpio$I2SDATL$0$0
Fgpio$PKTSTATUS$0$0
Fgpio$B_2$0$0
Fgpio$T4CH1IF$0$0
Fgpio$T1IE$0$0
Fgpio$P2_2$0$0
Fgpio$_SOCON2$0$0
Fgpio$P1_3$0$0
Fgpio$P0_4$0$0
Fgpio$PKTCTRL0$0$0
Fgpio$B_3$0$0
Fgpio$T1IF$0$0
Fgpio$T2IE$0$0
Fgpio$P2_3$0$0
Fgpio$_SOCON3$0$0
Fgpio$P1_4$0$0
Fgpio$P0_5$0$0
Fgpio$TCON$0$0
Fgpio$USBCSIL$0$0
Fgpio$PKTCTRL1$0$0
Fgpio$B_4$0$0
Fgpio$T2IF$0$0
Fgpio$T3IE$0$0
Fgpio$STIE$0$0
Fgpio$P2_4$0$0
Fgpio$_SOCON4$0$0
Fgpio$P1_5$0$0
Fgpio$P0_6$0$0
Fgpio$B_5$0$0
Fgpio$ACC_0$0$0
Fgpio$STIF$0$0
Fgpio$T3IF$0$0
Fgpio$T4IE$0$0
Fgpio$ADCIE$0$0
Fgpio$P2_5$0$0
Fgpio$_SOCON5$0$0
Fgpio$P1_6$0$0
Fgpio$P0_7$0$0
Fgpio$USBCNTH$0$0
Fgpio$USBCSOH$0$0
Fgpio$USBFRMH$0$0
Fgpio$B_6$0$0
Fgpio$ACC_1$0$0
Fgpio$T4IF$0$0
Fgpio$P2_6$0$0
Fgpio$_SOCON6$0$0
Fgpio$P1_7$0$0
Fgpio$ADCIF$0$0
Fgpio$PERCFG$0$0
Fgpio$FWDATA$0$0
Fgpio$WORTIME0$0$0
Fgpio$IOCFG0$0$0
Fgpio$B_7$0$0
Fgpio$ACC_2$0$0
Fgpio$P2_7$0$0
Fgpio$_SOCON7$0$0
Fgpio$WORTIME1$0$0
Fgpio$USBMAXI$0$0
Fgpio$IOCFG1$0$0
Fgpio$FSCAL0$0$0
Fgpio$ACC_3$0$0
Fgpio$FREQEST$0$0
Fgpio$IOCFG2$0$0
Fgpio$FSCAL1$0$0
Fgpio$CHANNR$0$0
Fgpio$ACC_4$0$0
Fgpio$DMAREQ$0$0
Fgpio$DMA0CFGH$0$0
Fgpio$CLKCON$0$0
Fgpio$USBCNTL$0$0
Fgpio$USBCSOL$0$0
Fgpio$USBFRML$0$0
Fgpio$USBCIE$0$0
Fgpio$FSCAL2$0$0
Fgpio$ACC_5$0$0
Fgpio$T1CCTL0$0$0
Fgpio$DMA1CFGH$0$0
Fgpio$USBCIF$0$0
Fgpio$FSCAL3$0$0
Fgpio$ACC_6$0$0
Fgpio$RFTXRXIE$0$0
Fgpio$T1CCTL1$0$0
Fgpio$RFD$0$0
Fgpio$U1RE$0$0
Fgpio$ACC_7$0$0
Fgpio$RFTXRXIF$0$0
Fgpio$T1CCTL2$0$0
Fgpio$T3CCTL0$0$0
Fgpio$T2CT$0$0
Fgpio$FSCTRL0$0$0
Fgpio$T4CCTL0$0$0
Fgpio$DMA0CFGL$0$0
Fgpio$DMAIRQ$0$0
Fgpio$T3CCTL1$0$0
Fgpio$USBMAXO$0$0
Fgpio$FREND0$0$0
Fgpio$FSCTRL1$0$0
Fgpio$T4CCTL1$0$0
Fgpio$RFST$0$0
Fgpio$DMA1CFGL$0$0
Fgpio$FREND1$0$0
Fgpio$DMAIE$0$0
Fgpio$USBIIE$0$0
Fgpio$RSSI$0$0
Fgpio$U1SLAVE$0$0
Fgpio$T3OVFIF$0$0
Fgpio$DMAIF$0$0
Fgpio$_IEN06$0$0
Fgpio$FADDR$0$0
Fgpio$U0BAUD$0$0
Fgpio$USBIIF$0$0
Fgpio$T4OVFIF$0$0
Fgpio$_IEN16$0$0
Fgpio$U1BAUD$0$0
Fgpio$_IEN17$0$0
Fgpio$T1CC0H$0$0
Fgpio$ENCDI$0$0
Fgpio$MARCSTATE$0$0
Fgpio$AC$0$0
Fgpio$ENCIE$0$0
Fgpio$T1CC1H$0$0
Fgpio$BSCFG$0$0
Fgpio$T1CC2H$0$0
Fgpio$LQI$0$0
Fgpio$VERSION$0$0
Fgpio$EA$0$0
Fgpio$U0DBUF$0$0
Fgpio$USBOIE$0$0
Fgpio$VCO_VC_DAC$0$0
Fgpio$PARTNUM$0$0
Fgpio$U1DBUF$0$0
Fgpio$T1CC0L$0$0
Fgpio$DPS$0$0
Fgpio$USBOIF$0$0
Fgpio$T1CC1L$0$0
Fgpio$MEMCTR$0$0
Fgpio$T2PR$0$0
Fgpio$T1CC2L$0$0
Fgpio$ENCDO$0$0
Fgpio$IP0$0$0
Fgpio$I2SSTAT$0$0
Fgpio$I2SWCNT$0$0
Fgpio$IP1$0$0
Fgpio$MPAGE$0$0
Fgpio$U1MODE$0$0
Fgpio$ENCCS$0$0
Fgpio$IRCON2$0$0
Fgpio$WORCTRL$0$0
Fgpio$PKTLEN$0$0
Fgpio$AGCCTRL0$0$0
Fgpio$ADCH$0$0
Fgpio$AGCCTRL1$0$0
Fgpio$FWT$0$0
Fgpio$AGCCTRL2$0$0
Fgpio$DMA0CFG$0$0
Fgpio$T1CNTH$0$0
Fgpio$DMA1CFG$0$0
Fgpio$ENCIF_0$0$0
Fgpio$ADCL$0$0
Fgpio$RS0$0$0
Fgpio$ENCIF_1$0$0
Fgpio$F0$0$0
Fgpio$RS1$0$0
Fgpio$T1CNTL$0$0
Fgpio$P0IFG$0$0
Fgpio$F1$0$0
Fgpio$WOREVT0$0$0
Fgpio$P1IFG$0$0
Fgpio$ADCCFG$0$0
Fgpio$WOREVT1$0$0
Fgpio$P2IFG$0$0
Fgpio$TIMIF$0$0
Fgpio$SLEEP$0$0
Fgpio$ADCCON1$0$0
Fgpio$PSW$0$0
Fgpio$ADCCON2$0$0
Fgpio$ADDR$0$0
Fgpio$T1CC0$0$0
Fgpio$IRCON$0$0
Fgpio$ADCCON3$0$0
Fgpio$CY$0$0
Fgpio$T1CC1$0$0
Fgpio$PICTL$0$0
Fgpio$URX0IE$0$0
Fgpio$T1CC2$0$0
Fgpio$T3CC0$0$0
Fgpio$P1IEN$0$0
.__.ABS.
Fgpio$I2SCLKF0$0$0
Fgpio$MDMCFG0$0$0
Fgpio$FREQ0$0$0
Fgpio$WDTIF$0$0
Fgpio$URX1IE$0$0
Fgpio$URX0IF$0$0
Fgpio$T4CC0$0$0
Fgpio$T3CC1$0$0
Fgpio$WDCTL$0$0
A$gpio$897
A$gpio$888
A$gpio$879
C$gpio.c$56$1$1
C$gpio.c$38$1$1
A$gpio$898
A$gpio$889
C$gpio.c$66$1$1
C$gpio.c$48$1$1
C$gpio.c$39$1$1
A$gpio$899
C$gpio.c$58$1$1
C$gpio.c$55$2$3
C$gpio.c$49$1$1
C$gpio.c$68$1$1
C$gpio.c$67$2$3
XG$setDigitalInput$0$0
XG$setDigitalOutput$0$0
G$setDigitalInput$0$0
G$setDigitalOutput$0$0
A$gpio$1100
A$gpio$1110
A$gpio$1101
A$gpio$1020
A$gpio$1300
A$gpio$1210
A$gpio$1201
A$gpio$1400
A$gpio$1211
A$gpio$1202
A$gpio$1130
A$gpio$1121
A$gpio$1112
A$gpio$1103
A$gpio$1040
A$gpio$1031
A$gpio$1022
A$gpio$1013
A$gpio$1320
A$gpio$1311
A$gpio$1302
A$gpio$1212
A$gpio$1140
A$gpio$1131
A$gpio$1122
A$gpio$1113
A$gpio$1104
A$gpio$1050
A$gpio$1041
A$gpio$1032
A$gpio$1023
A$gpio$1014
A$gpio$1321
A$gpio$1312
A$gpio$1303
A$gpio$1213
A$gpio$1204
A$gpio$1150
A$gpio$1141
A$gpio$1132
A$gpio$1123
A$gpio$1114
A$gpio$1105
A$gpio$1060
A$gpio$1051
A$gpio$1042
A$gpio$1033
A$gpio$1024
A$gpio$1015
_setPort0PullType
A$gpio$1403
A$gpio$1331
A$gpio$1214
A$gpio$1205
_setPort1PullType
A$gpio$1323
A$gpio$1314
A$gpio$1305
A$gpio$1215
A$gpio$1170
A$gpio$1161
A$gpio$1152
A$gpio$1143
A$gpio$1134
A$gpio$1125
A$gpio$1116
A$gpio$1107
A$gpio$1080
A$gpio$1071
A$gpio$1062
A$gpio$1053
A$gpio$1044
A$gpio$1035
A$gpio$1026
A$gpio$1017
_setPort2PullType
A$gpio$1324
A$gpio$1315
A$gpio$1306
A$gpio$1270
A$gpio$1207
_isPinHigh
A$gpio$1370
A$gpio$1352
A$gpio$1208
A$gpio$1181
A$gpio$1172
A$gpio$1163
A$gpio$1154
A$gpio$1145
A$gpio$1136
A$gpio$1127
A$gpio$1118
A$gpio$1109
A$gpio$1091
A$gpio$1082
A$gpio$1073
A$gpio$1064
A$gpio$1055
A$gpio$1046
A$gpio$1037
A$gpio$1028
A$gpio$1019
A$gpio$1371
A$gpio$1317
A$gpio$1308
A$gpio$1290
A$gpio$1281
A$gpio$1272
A$gpio$1209
A$gpio$1173
A$gpio$1164
A$gpio$1155
A$gpio$1146
A$gpio$1137
A$gpio$1128
A$gpio$1119
A$gpio$1092
A$gpio$1083
A$gpio$1074
A$gpio$1065
A$gpio$1056
A$gpio$1047
A$gpio$1038
A$gpio$1029
A$gpio$1372
A$gpio$1318
A$gpio$1309
A$gpio$1291
A$gpio$1282
A$gpio$1273
A$gpio$1355
A$gpio$1346
A$gpio$1328
A$gpio$1175
A$gpio$1166
A$gpio$1157
A$gpio$1148
A$gpio$1139
A$gpio$1094
A$gpio$1085
A$gpio$1076
A$gpio$1067
A$gpio$1058
A$gpio$1049
A$gpio$1347
A$gpio$1293
A$gpio$1284
A$gpio$1275
A$gpio$1185
A$gpio$1176
A$gpio$1167
A$gpio$1158
A$gpio$1149
A$gpio$1095
A$gpio$1086
A$gpio$1077
A$gpio$1068
A$gpio$1059
A$gpio$1348
A$gpio$1294
A$gpio$1285
A$gpio$1276
A$gpio$1177
A$gpio$1168
A$gpio$1159
A$gpio$1096
A$gpio$1087
A$gpio$1078
A$gpio$1069
A$gpio$1394
A$gpio$1376
A$gpio$1395
A$gpio$1296
A$gpio$1287
A$gpio$1278
A$gpio$1269
A$gpio$1179
A$gpio$1098
A$gpio$1089
A$gpio$1396
A$gpio$1297
A$gpio$1288
A$gpio$1279
A$gpio$1198
XG$setPort0PullType$0$0
A$gpio$1379
XG$setPort1PullType$0$0
A$gpio$1299
XG$setPort2PullType$0$0
XG$isPinHigh$0$0
A$gpio$900
A$gpio$910
A$gpio$920
A$gpio$902
G$setPort0PullType$0$0
A$gpio$912
A$gpio$903
A$gpio$840
G$setPort1PullType$0$0
A$gpio$922
A$gpio$913
A$gpio$904
A$gpio$850
A$gpio$832
G$setPort2PullType$0$0
A$gpio$923
A$gpio$914
A$gpio$905
A$gpio$860
A$gpio$842
A$gpio$833
A$gpio$770
A$gpio$761
G$isPinHigh$0$0
A$gpio$951
A$gpio$942
A$gpio$924
A$gpio$915
A$gpio$870
A$gpio$852
A$gpio$843
A$gpio$834
A$gpio$771
A$gpio$952
A$gpio$907
A$gpio$880
A$gpio$862
A$gpio$853
A$gpio$844
A$gpio$835
A$gpio$772
A$gpio$953
A$gpio$917
A$gpio$908
A$gpio$890
A$gpio$872
A$gpio$863
A$gpio$854
A$gpio$845
A$gpio$773
A$gpio$764
_setDigitalInput
A$gpio$954
A$gpio$945
A$gpio$918
A$gpio$909
A$gpio$882
A$gpio$873
A$gpio$864
A$gpio$855
A$gpio$837
A$gpio$774
A$gpio$765
C$gpio.c$50$1$1
C$gpio.c$41$1$1
_setDigitalOutput
A$gpio$955
A$gpio$946
A$gpio$928
A$gpio$919
A$gpio$892
A$gpio$883
A$gpio$874
A$gpio$865
A$gpio$847
A$gpio$838
A$gpio$775
C$gpio.c$60$1$1
A$gpio$956
A$gpio$893
A$gpio$884
A$gpio$875
A$gpio$857
A$gpio$848
A$gpio$839
A$gpio$776
A$gpio$767
C$gpio.c$52$1$1
C$gpio.c$43$1$1
C$gpio.c$36$0$0
A$gpio$957
A$gpio$948
A$gpio$894
A$gpio$885
A$gpio$867
A$gpio$858
A$gpio$849
A$gpio$777
A$gpio$768
C$gpio.c$62$1$1
C$gpio.c$44$1$1
A$gpio$958
A$gpio$949
A$gpio$895
A$gpio$877
A$gpio$868
A$gpio$859
A$gpio$778
C$gpio.c$54$1$1
A$gpio$959
A$gpio$887
A$gpio$878
A$gpio$869
C$gpio.c$64$1$1
C$gpio.c$61$2$3
C$gpio.c$46$1$1
gpio
;!FILE libraries/src/gpio/gpio.asm
XH
H 1C areas 283 global symbols
M gpio
O -mmcs51 --model-medium
S Fgpio$I2SCLKF1$0$0 DefDF47
S Fgpio$MDMCFG1$0$0 DefDF0F
S Fgpio$FREQ1$0$0 DefDF0A
S Fgpio$URX1IF$0$0 Def008F
S Fgpio$P0DIR$0$0 Def00FD
S Fgpio$T4CC1$0$0 Def00EF
S Fgpio$USBF0$0$0 DefDE20
S Fgpio$USBPOW$0$0 DefDE01
S Fgpio$I2SCLKF2$0$0 DefDF48
S Fgpio$MCSM0$0$0 DefDF14
S Fgpio$MDMCFG2$0$0 DefDF0E
S Fgpio$FREQ2$0$0 DefDF09
S Fgpio$UTX0IF$0$0 Def00E9
S Fgpio$P1DIR$0$0 Def00FE
S Fgpio$P0$0$0 Def0080
S Fgpio$USBF1$0$0 DefDE22
S Fgpio$MCSM1$0$0 DefDF13
S Fgpio$MDMCFG3$0$0 DefDF0D
S Fgpio$_IRCON25$0$0 Def00ED
S Fgpio$UTX1IF$0$0 Def00EA
S Fgpio$OVFIM$0$0 Def00DE
S Fgpio$P2DIR$0$0 Def00FF
S Fgpio$U0GCR$0$0 Def00C5
S Fgpio$P1$0$0 Def0090
S Fgpio$USBF2$0$0 DefDE24
S Fgpio$USBINDEX$0$0 DefDE0E
S Fgpio$MCSM2$0$0 DefDF12
S Fgpio$MDMCFG4$0$0 DefDF0C
S Fgpio$U1ACTIVE$0$0 Def00F8
S Fgpio$_IRCON26$0$0 Def00EE
S Fgpio$_TCON_0$0$0 Def0088
S Fgpio$U1GCR$0$0 Def00FC
S Fgpio$B$0$0 Def00F0
S Fgpio$P2$0$0 Def00A0
S Fgpio$USBF3$0$0 DefDE26
S Fgpio$U1RX_BYTE$0$0 Def00FA
S Fgpio$_IRCON27$0$0 Def00EF
S Fgpio$S0CON$0$0 Def0098
S Fgpio$SP$0$0 Def0081
S Fgpio$USBF4$0$0 DefDE28
S Fgpio$_TCON_2$0$0 Def008A
S Fgpio$P0SEL$0$0 Def00F3
S Fgpio$WORIRQ$0$0 Def00A1
S Fgpio$S1CON$0$0 Def009B
S Fgpio$USBF5$0$0 DefDE2A
S Fgpio$USBADDR$0$0 DefDE00
S Fgpio$U1TX_BYTE$0$0 Def00F9
S Fgpio$OV$0$0 Def00D2
S Fgpio$P1SEL$0$0 Def00F4
S Fgpio$_TCON_4$0$0 Def008C
S Fgpio$P2SEL$0$0 Def00F5
S Fgpio$RFIF$0$0 Def00E9
S Fgpio$ACC$0$0 Def00E0
S Fgpio$P0INP$0$0 Def008F
S Fgpio$PA_TABLE0$0$0 DefDF2E
S Fgpio$FOCCFG$0$0 DefDF15
S Fgpio$_TCON_6$0$0 Def008E
S Fgpio$ADC$0$0 DefFFFFBBBA
S Fgpio$P1INP$0$0 Def00F6
S Fgpio$T1CTL$0$0 Def00E4
S Fgpio$P2INP$0$0 Def00F7
S Fgpio$FCTL$0$0 Def00AE
S Fgpio$FADDRH$0$0 Def00AD
S Fgpio$T2CTL$0$0 Def009E
S Fgpio$T3CTL$0$0 Def00CB
S Fgpio$DEVIATN$0$0 DefDF11
S Fgpio$T4CTL$0$0 Def00EB
S Fgpio$T3CNT$0$0 Def00CA
S Fgpio$RNDH$0$0 Def00BD
S Fgpio$IEN0$0$0 Def00A8
S Fgpio$DPH0$0$0 Def0083
S Fgpio$SYNC0$0$0 DefDF01
S Fgpio$T4CNT$0$0 Def00EA
S Fgpio$IEN1$0$0 Def00B8
S Fgpio$FADDRL$0$0 Def00AC
S Fgpio$U0CSR$0$0 Def0086
S Fgpio$DPH1$0$0 Def0085
S Fgpio$I2SCFG0$0$0 DefDF40
S Fgpio$SYNC1$0$0 DefDF00
S Fgpio$P0IE$0$0 Def00BD
S Fgpio$U1CSR$0$0 Def00F8
S Fgpio$IEN2$0$0 Def009A
S Fgpio$RFIM$0$0 Def0091
S Fgpio$I2SDATH$0$0 DefDF43
S Fgpio$I2SCFG1$0$0 DefDF41
S Fgpio$U1ERR$0$0 Def00FB
S Fgpio$_TIMIF7$0$0 Def00DF
S Fgpio$P0IF$0$0 Def00C5
S Fgpio$P0_0$0$0 Def0080
S Fgpio$U0UCR$0$0 Def00C4
S Fgpio$ENDIAN$0$0 Def0095
S Fgpio$TEST0$0$0 DefDF25
S Fgpio$P1IF$0$0 Def00EB
S Fgpio$P$0$0 Def00D0
S Fgpio$_IRCON6$0$0 Def00C6
S Fgpio$P1_0$0$0 Def0090
S Fgpio$P0_1$0$0 Def0081
S Fgpio$U1UCR$0$0 Def00FB
S Fgpio$RNDL$0$0 Def00BC
S Fgpio$PCON$0$0 Def0087
S Fgpio$DPL0$0$0 Def0082
S Fgpio$USBCSIH$0$0 DefDE12
S Fgpio$TEST1$0$0 DefDF24
S Fgpio$U1FE$0$0 Def00FC
S Fgpio$B_0$0$0 Def00F0
S Fgpio$P2IF$0$0 Def00E8
S Fgpio$T3CH0IF$0$0 Def00D9
S Fgpio$P2_0$0$0 Def00A0
S Fgpio$P1_1$0$0 Def0091
S Fgpio$P0_2$0$0 Def0082
S Fgpio$DPL1$0$0 Def0084
S Fgpio$TEST2$0$0 DefDF23
S Fgpio$B_1$0$0 Def00F1
S Fgpio$T4CH0IF$0$0 Def00DC
S Fgpio$T3CH1IF$0$0 Def00DA
S Fgpio$P2_1$0$0 Def00A1
S Fgpio$P1_2$0$0 Def0092
S Fgpio$P0_3$0$0 Def0083
S Fgpio$DMAARM$0$0 Def00D6
S Fgpio$I2SDATL$0$0 DefDF42
S Fgpio$PKTSTATUS$0$0 DefDF3C
S Fgpio$B_2$0$0 Def00F2
S Fgpio$T4CH1IF$0$0 Def00DD
S Fgpio$T1IE$0$0 Def00B9
S Fgpio$P2_2$0$0 Def00A2
S Fgpio$_SOCON2$0$0 Def009A
S Fgpio$P1_3$0$0 Def0093
S Fgpio$P0_4$0$0 Def0084
S Fgpio$PKTCTRL0$0$0 DefDF04
S Fgpio$B_3$0$0 Def00F3
S Fgpio$T1IF$0$0 Def00C1
S Fgpio$T2IE$0$0 Def00BA
S Fgpio$P2_3$0$0 Def00A3
S Fgpio$_SOCON3$0$0 Def009B
S Fgpio$P1_4$0$0 Def0094
S Fgpio$P0_5$0$0 Def0085
S Fgpio$TCON$0$0 Def0088
S Fgpio$USBCSIL$0$0 DefDE11
S Fgpio$PKTCTRL1$0$0 DefDF03
S Fgpio$B_4$0$0 Def00F4
S Fgpio$T2IF$0$0 Def00C2
S Fgpio$T3IE$0$0 Def00BB
S Fgpio$STIE$0$0 Def00AD
S Fgpio$P2_4$0$0 Def00A4
S Fgpio$_SOCON4$0$0 Def009C
S Fgpio$P1_5$0$0 Def0095
S Fgpio$P0_6$0$0 Def0086
S Fgpio$B_5$0$0 Def00F5
S Fgpio$ACC_0$0$0 Def00E0
S Fgpio$STIF$0$0 Def00C7
S Fgpio$T3IF$0$0 Def00C3
S Fgpio$T4IE$0$0 Def00BC
S Fgpio$ADCIE$0$0 Def00A9
S Fgpio$P2_5$0$0 Def00A5
S Fgpio$_SOCON5$0$0 Def009D
S Fgpio$P1_6$0$0 Def0096
S Fgpio$P0_7$0$0 Def0087
S Fgpio$USBCNTH$0$0 DefDE17
S Fgpio$USBCSOH$0$0 DefDE15
S Fgpio$USBFRMH$0$0 DefDE0D
S Fgpio$B_6$0$0 Def00F6
S Fgpio$ACC_1$0$0 Def00E1
S Fgpio$T4IF$0$0 Def00C4
S Fgpio$P2_6$0$0 Def00A6
S Fgpio$_SOCON6$0$0 Def009E
S Fgpio$P1_7$0$0 Def0097
S Fgpio$ADCIF$0$0 Def008D
S Fgpio$PERCFG$0$0 Def00F1
S Fgpio$FWDATA$0$0 Def00AF
S Fgpio$WORTIME0$0$0 Def00A5
S Fgpio$IOCFG0$0$0 DefDF31
S Fgpio$B_7$0$0 Def00F7
S Fgpio$ACC_2$0$0 Def00E2
S Fgpio$P2_7$0$0 Def00A7
S Fgpio$_SOCON7$0$0 Def009F
S Fgpio$WORTIME1$0$0 Def00A6
S Fgpio$USBMAXI$0$0 DefDE10
S Fgpio$IOCFG1$0$0 DefDF30
S Fgpio$FSCAL0$0$0 DefDF1F
S Fgpio$ACC_3$0$0 Def00E3
S Fgpio$FREQEST$0$0 DefDF38
S Fgpio$IOCFG2$0$0 DefDF2F
S Fgpio$FSCAL1$0$0 DefDF1E
S Fgpio$CHANNR$0$0 DefDF06
S Fgpio$ACC_4$0$0 Def00E4
S Fgpio$DMAREQ$0$0 Def00D7
S Fgpio$DMA0CFGH$0$0 Def00D5
S Fgpio$CLKCON$0$0 Def00C6
S Fgpio$USBCNTL$0$0 DefDE16
S Fgpio$USBCSOL$0$0 DefDE14
S Fgpio$USBFRML$0$0 DefDE0C
S Fgpio$USBCIE$0$0 DefDE0B
S Fgpio$FSCAL2$0$0 DefDF1D
S Fgpio$ACC_5$0$0 Def00E5
S Fgpio$T1CCTL0$0$0 Def00E5
S Fgpio$DMA1CFGH$0$0 Def00D3
S Fgpio$USBCIF$0$0 DefDE06
S Fgpio$FSCAL3$0$0 DefDF1C
S Fgpio$ACC_6$0$0 Def00E6
S Fgpio$RFTXRXIE$0$0 Def00A8
S Fgpio$T1CCTL1$0$0 Def00E6
S Fgpio$RFD$0$0 Def00D9
S Fgpio$U1RE$0$0 Def00FE
S Fgpio$ACC_7$0$0 Def00E7
S Fgpio$RFTXRXIF$0$0 Def0089
S Fgpio$T1CCTL2$0$0 Def00E7
S Fgpio$T3CCTL0$0$0 Def00CC
S Fgpio$T2CT$0$0 Def009C
S Fgpio$FSCTRL0$0$0 DefDF08
S Fgpio$T4CCTL0$0$0 Def00EC
S Fgpio$DMA0CFGL$0$0 Def00D4
S Fgpio$DMAIRQ$0$0 Def00D1
S Fgpio$T3CCTL1$0$0 Def00CE
S Fgpio$USBMAXO$0$0 DefDE13
S Fgpio$FREND0$0$0 DefDF1B
S Fgpio$FSCTRL1$0$0 DefDF07
S Fgpio$T4CCTL1$0$0 Def00EE
S Fgpio$RFST$0$0 Def00E1
S Fgpio$DMA1CFGL$0$0 Def00D2
S Fgpio$FREND1$0$0 DefDF1A
S Fgpio$DMAIE$0$0 Def00B8
S Fgpio$USBIIE$0$0 DefDE07
S Fgpio$RSSI$0$0 DefDF3A
S Fgpio$U1SLAVE$0$0 Def00FD
S Fgpio$T3OVFIF$0$0 Def00D8
S Fgpio$DMAIF$0$0 Def00C0
S Fgpio$_IEN06$0$0 Def00AE
S Fgpio$FADDR$0$0 DefFFFFADAC
S Fgpio$U0BAUD$0$0 Def00C2
S Fgpio$USBIIF$0$0 DefDE02
S Fgpio$T4OVFIF$0$0 Def00DB
S Fgpio$_IEN16$0$0 Def00BE
S Fgpio$U1BAUD$0$0 Def00FA
S Fgpio$_IEN17$0$0 Def00BF
S Fgpio$T1CC0H$0$0 Def00DB
S Fgpio$ENCDI$0$0 Def00B1
S Fgpio$MARCSTATE$0$0 DefDF3B
S Fgpio$AC$0$0 Def00D6
S Fgpio$ENCIE$0$0 Def00AC
S Fgpio$T1CC1H$0$0 Def00DD
S Fgpio$BSCFG$0$0 DefDF16
S Fgpio$T1CC2H$0$0 Def00DF
S Fgpio$LQI$0$0 DefDF39
S Fgpio$VERSION$0$0 DefDF37
S Fgpio$EA$0$0 Def00AF
S Fgpio$U0DBUF$0$0 Def00C1
S Fgpio$USBOIE$0$0 DefDE09
S Fgpio$VCO_VC_DAC$0$0 DefDF3D
S Fgpio$PARTNUM$0$0 DefDF36
S Fgpio$U1DBUF$0$0 Def00F9
S Fgpio$T1CC0L$0$0 Def00DA
S Fgpio$DPS$0$0 Def0092
S Fgpio$USBOIF$0$0 DefDE04
S Fgpio$T1CC1L$0$0 Def00DC
S Fgpio$MEMCTR$0$0 Def00C7
S Fgpio$T2PR$0$0 Def009D
S Fgpio$T1CC2L$0$0 Def00DE
S Fgpio$ENCDO$0$0 Def00B2
S Fgpio$IP0$0$0 Def00A9
S Fgpio$I2SSTAT$0$0 DefDF45
S Fgpio$I2SWCNT$0$0 DefDF44
S Fgpio$IP1$0$0 Def00B9
S Fgpio$MPAGE$0$0 Def0093
S Fgpio$U1MODE$0$0 Def00FF
S Fgpio$ENCCS$0$0 Def00B3
S Fgpio$IRCON2$0$0 Def00E8
S Fgpio$WORCTRL$0$0 Def00A2
S Fgpio$PKTLEN$0$0 DefDF02
S Fgpio$AGCCTRL0$0$0 DefDF19
S Fgpio$ADCH$0$0 Def00BB
S Fgpio$AGCCTRL1$0$0 DefDF18
S Fgpio$FWT$0$0 Def00AB
S Fgpio$AGCCTRL2$0$0 DefDF17
S Fgpio$DMA0CFG$0$0 DefFFFFD5D4
S Fgpio$T1CNTH$0$0 Def00E3
S Fgpio$DMA1CFG$0$0 DefFFFFD3D2
S Fgpio$ENCIF_0$0$0 Def0098
S Fgpio$ADCL$0$0 Def00BA
S Fgpio$RS0$0$0 Def00D3
S Fgpio$ENCIF_1$0$0 Def0099
S Fgpio$F0$0$0 Def00D5
S Fgpio$RS1$0$0 Def00D4
S Fgpio$T1CNTL$0$0 Def00E2
S Fgpio$P0IFG$0$0 Def0089
S Fgpio$F1$0$0 Def00D1
S Fgpio$WOREVT0$0$0 Def00A3
S Fgpio$P1IFG$0$0 Def008A
S Fgpio$ADCCFG$0$0 Def00F2
S Fgpio$WOREVT1$0$0 Def00A4
S Fgpio$P2IFG$0$0 Def008B
S Fgpio$TIMIF$0$0 Def00D8
S Fgpio$SLEEP$0$0 Def00BE
S Fgpio$ADCCON1$0$0 Def00B4
S Fgpio$PSW$0$0 Def00D0
S Fgpio$ADCCON2$0$0 Def00B5
S Fgpio$ADDR$0$0 DefDF05
S Fgpio$T1CC0$0$0 DefFFFFDBDA
S Fgpio$IRCON$0$0 Def00C0
S Fgpio$ADCCON3$0$0 Def00B6
S Fgpio$CY$0$0 Def00D7
S Fgpio$T1CC1$0$0 DefFFFFDDDC
S Fgpio$PICTL$0$0 Def008C
S Fgpio$URX0IE$0$0 Def00AA
S Fgpio$T1CC2$0$0 DefFFFFDFDE
S Fgpio$T3CC0$0$0 Def00CD
S Fgpio$P1IEN$0$0 Def008D
S .__.ABS. Def0000
S Fgpio$I2SCLKF0$0$0 DefDF46
S Fgpio$MDMCFG0$0$0 DefDF10
S Fgpio$FREQ0$0$0 DefDF0B
S Fgpio$WDTIF$0$0 Def00EC
S Fgpio$URX1IE$0$0 Def00AB
S Fgpio$URX0IF$0$0 Def008B
S Fgpio$T4CC0$0$0 Def00ED
S Fgpio$T3CC1$0$0 Def00CF
S Fgpio$WDCTL$0$0 Def00C9
A _CODE size 0 flags 0 addr 0
A RSEG size 0 flags 8 addr 0
A RSEG0 size 0 flags 8 addr 0
A RSEG1 size 0 flags 8 addr 0
A REG_BANK_0 size 8 flags 4 addr 0
A BIT_BANK size 1 flags 4 addr 0
A DSEG size 0 flags 0 addr 0
A OSEG size 0 flags 4 addr 0
A ISEG size 0 flags 0 addr 0
A IABS size 0 flags 8 addr 0
A BSEG size 0 flags 80 addr 0
A PSEG size 0 flags 50 addr 0
A XSEG size 0 flags 40 addr 0
A XABS size 0 flags 48 addr 0
A XISEG size 0 flags 40 addr 0
A HOME size 0 flags 20 addr 0
A GSINIT0 size 0 flags 20 addr 0
A GSINIT1 size 0 flags 20 addr 0
A GSINIT2 size 0 flags 20 addr 0
A GSINIT3 size 0 flags 20 addr 0
A GSINIT4 size 0 flags 20 addr 0
A GSINIT5 size 0 flags 20 addr 0
A GSINIT size 0 flags 20 addr 0
A GSFINAL size 0 flags 20 addr 0
A CSEG size 2EE flags 20 addr 0
S A$gpio$897 Def00B1
S A$gpio$888 Def00A3
S A$gpio$879 Def0095
S C$gpio.c$56$1$1 Def02D7
S C$gpio.c$38$1$1 Def0002
S A$gpio$898 Def00B3
S A$gpio$889 Def00A5
S C$gpio.c$66$1$1 Def02E3
S C$gpio.c$48$1$1 Def0249
S C$gpio.c$39$1$1 Def00E0
S A$gpio$899 Def00B5
S C$gpio.c$58$1$1 Def02D8
S C$gpio.c$55$2$3 Def02D4
S C$gpio.c$49$1$1 Def02CB
S C$gpio.c$68$1$1 Def02ED
S C$gpio.c$67$2$3 Def02EA
S XG$setDigitalInput$0$0 Def0246
S XG$setDigitalOutput$0$0 Def00E0
S G$setDigitalInput$0$0 Def00E1
S G$setDigitalOutput$0$0 Def0000
S A$gpio$1100 Def01BC
S A$gpio$1110 Def01CE
S A$gpio$1101 Def01BF
S A$gpio$1020 Def0138
S A$gpio$1300 Def02B2
S A$gpio$1210 Def0257
S A$gpio$1201 Def0249
S A$gpio$1400 Def02EA
S A$gpio$1211 Def0259
S A$gpio$1202 Def024B
S A$gpio$1130 Def01ED
S A$gpio$1121 Def01DE
S A$gpio$1112 Def01CF
S A$gpio$1103 Def01C0
S A$gpio$1040 Def0157
S A$gpio$1031 Def0148
S A$gpio$1022 Def0139
S A$gpio$1013 Def012A
S A$gpio$1320 Def02C5
S A$gpio$1311 Def02BC
S A$gpio$1302 Def02B3
S A$gpio$1212 Def025A
S A$gpio$1140 Def01FF
S A$gpio$1131 Def01F0
S A$gpio$1122 Def01E1
S A$gpio$1113 Def01D2
S A$gpio$1104 Def01C3
S A$gpio$1050 Def0169
S A$gpio$1041 Def015A
S A$gpio$1032 Def014B
S A$gpio$1023 Def013C
S A$gpio$1014 Def012D
S A$gpio$1321 Def02C7
S A$gpio$1312 Def02BE
S A$gpio$1303 Def02B5
S A$gpio$1213 Def025C
S A$gpio$1204 Def024E
S A$gpio$1150 Def0211
S A$gpio$1141 Def0202
S A$gpio$1132 Def01F3
S A$gpio$1123 Def01E4
S A$gpio$1114 Def01D5
S A$gpio$1105 Def01C6
S A$gpio$1060 Def017B
S A$gpio$1051 Def016C
S A$gpio$1042 Def015D
S A$gpio$1033 Def014E
S A$gpio$1024 Def013F
S A$gpio$1015 Def0130
S _setPort0PullType Def02CD
S A$gpio$1403 Def02ED
S A$gpio$1331 Def02CC
S A$gpio$1214 Def025D
S A$gpio$1205 Def0250
S _setPort1PullType Def02D8
S A$gpio$1323 Def02C8
S A$gpio$1314 Def02BF
S A$gpio$1305 Def02B6
S A$gpio$1215 Def025F
S A$gpio$1170 Def0231
S A$gpio$1161 Def0222
S A$gpio$1152 Def0213
S A$gpio$1143 Def0204
S A$gpio$1134 Def01F5
S A$gpio$1125 Def01E6
S A$gpio$1116 Def01D7
S A$gpio$1107 Def01C8
S A$gpio$1080 Def019B
S A$gpio$1071 Def018C
S A$gpio$1062 Def017D
S A$gpio$1053 Def016E
S A$gpio$1044 Def015F
S A$gpio$1035 Def0150
S A$gpio$1026 Def0141
S A$gpio$1017 Def0132
S _setPort2PullType Def02E3
S A$gpio$1324 Def02CA
S A$gpio$1315 Def02C1
S A$gpio$1306 Def02B8
S A$gpio$1270 Def0294
S A$gpio$1207 Def0253
S _isPinHigh Def0247
S A$gpio$1370 Def02D8
S A$gpio$1352 Def02D4
S A$gpio$1208 Def0254
S A$gpio$1181 Def0243
S A$gpio$1172 Def0234
S A$gpio$1163 Def0225
S A$gpio$1154 Def0216
S A$gpio$1145 Def0207
S A$gpio$1136 Def01F8
S A$gpio$1127 Def01E9
S A$gpio$1118 Def01DA
S A$gpio$1109 Def01CB
S A$gpio$1091 Def01AD
S A$gpio$1082 Def019E
S A$gpio$1073 Def018F
S A$gpio$1064 Def0180
S A$gpio$1055 Def0171
S A$gpio$1046 Def0162
S A$gpio$1037 Def0153
S A$gpio$1028 Def0144
S A$gpio$1019 Def0135
S A$gpio$1371 Def02DB
S A$gpio$1317 Def02C2
S A$gpio$1308 Def02B9
S A$gpio$1290 Def02A7
S A$gpio$1281 Def029E
S A$gpio$1272 Def0295
S A$gpio$1209 Def0256
S A$gpio$1173 Def0237
S A$gpio$1164 Def0228
S A$gpio$1155 Def0219
S A$gpio$1146 Def020A
S A$gpio$1137 Def01FB
S A$gpio$1128 Def01EC
S A$gpio$1119 Def01DD
S A$gpio$1092 Def01B0
S A$gpio$1083 Def01A1
S A$gpio$1074 Def0192
S A$gpio$1065 Def0183
S A$gpio$1056 Def0174
S A$gpio$1047 Def0165
S A$gpio$1038 Def0156
S A$gpio$1029 Def0147
S A$gpio$1372 Def02DE
S A$gpio$1318 Def02C4
S A$gpio$1309 Def02BB
S A$gpio$1291 Def02A9
S A$gpio$1282 Def02A0
S A$gpio$1273 Def0297
S A$gpio$1355 Def02D7
S A$gpio$1346 Def02CD
S A$gpio$1328 Def02CB
S A$gpio$1175 Def0238
S A$gpio$1166 Def0229
S A$gpio$1157 Def021A
S A$gpio$1148 Def020B
S A$gpio$1139 Def01FC
S A$gpio$1094 Def01B1
S A$gpio$1085 Def01A2
S A$gpio$1076 Def0193
S A$gpio$1067 Def0184
S A$gpio$1058 Def0175
S A$gpio$1049 Def0166
S A$gpio$1347 Def02D0
S A$gpio$1293 Def02AA
S A$gpio$1284 Def02A1
S A$gpio$1275 Def0298
S A$gpio$1185 Def0246
S A$gpio$1176 Def023B
S A$gpio$1167 Def022C
S A$gpio$1158 Def021D
S A$gpio$1149 Def020E
S A$gpio$1095 Def01B4
S A$gpio$1086 Def01A5
S A$gpio$1077 Def0196
S A$gpio$1068 Def0187
S A$gpio$1059 Def0178
S A$gpio$1348 Def02D3
S A$gpio$1294 Def02AC
S A$gpio$1285 Def02A3
S A$gpio$1276 Def029A
S A$gpio$1177 Def023E
S A$gpio$1168 Def022F
S A$gpio$1159 Def0220
S A$gpio$1096 Def01B7
S A$gpio$1087 Def01A8
S A$gpio$1078 Def0199
S A$gpio$1069 Def018A
S A$gpio$1394 Def02E3
S A$gpio$1376 Def02DF
S A$gpio$1395 Def02E6
S A$gpio$1296 Def02AD
S A$gpio$1287 Def02A4
S A$gpio$1278 Def029B
S A$gpio$1269 Def0292
S A$gpio$1179 Def0240
S A$gpio$1098 Def01B9
S A$gpio$1089 Def01AA
S A$gpio$1396 Def02E9
S A$gpio$1297 Def02AF
S A$gpio$1288 Def02A6
S A$gpio$1279 Def029D
S A$gpio$1198 Def0247
S XG$setPort0PullType$0$0 Def02D7
S A$gpio$1379 Def02E2
S XG$setPort1PullType$0$0 Def02E2
S A$gpio$1299 Def02B0
S XG$setPort2PullType$0$0 Def02ED
S XG$isPinHigh$0$0 Def02CC
S A$gpio$900 Def00B8
S A$gpio$910 Def00C8
S A$gpio$920 Def00D8
S A$gpio$902 Def00B9
S G$setPort0PullType$0$0 Def02CD
S A$gpio$912 Def00C9
S A$gpio$903 Def00BB
S A$gpio$840 Def0058
S G$setPort1PullType$0$0 Def02D8
S A$gpio$922 Def00D9
S A$gpio$913 Def00CB
S A$gpio$904 Def00BD
S A$gpio$850 Def0068
S A$gpio$832 Def0049
S G$setPort2PullType$0$0 Def02E3
S A$gpio$923 Def00DB
S A$gpio$914 Def00CD
S A$gpio$905 Def00C0
S A$gpio$860 Def0078
S A$gpio$842 Def0059
S A$gpio$833 Def004B
S A$gpio$770 Def000A
S A$gpio$761 Def0000
S G$isPinHigh$0$0 Def0247
S A$gpio$951 Def00EB
S A$gpio$942 Def00E1
S A$gpio$924 Def00DD
S A$gpio$915 Def00D0
S A$gpio$870 Def0088
S A$gpio$852 Def0069
S A$gpio$843 Def005B
S A$gpio$834 Def004D
S A$gpio$771 Def000B
S A$gpio$952 Def00EC
S A$gpio$907 Def00C1
S A$gpio$880 Def0098
S A$gpio$862 Def0079
S A$gpio$853 Def006B
S A$gpio$844 Def005D
S A$gpio$835 Def0050
S A$gpio$772 Def000D
S A$gpio$953 Def00EE
S A$gpio$917 Def00D1
S A$gpio$908 Def00C3
S A$gpio$890 Def00A8
S A$gpio$872 Def0089
S A$gpio$863 Def007B
S A$gpio$854 Def006D
S A$gpio$845 Def0060
S A$gpio$773 Def000E
S A$gpio$764 Def0002
S _setDigitalInput Def00E1
S A$gpio$954 Def00EF
S A$gpio$945 Def00E3
S A$gpio$918 Def00D3
S A$gpio$909 Def00C5
S A$gpio$882 Def0099
S A$gpio$873 Def008B
S A$gpio$864 Def007D
S A$gpio$855 Def0070
S A$gpio$837 Def0051
S A$gpio$774 Def0010
S A$gpio$765 Def0004
S C$gpio.c$50$1$1 Def02CC
S C$gpio.c$41$1$1 Def00E1
S _setDigitalOutput Def0000
S A$gpio$955 Def00F1
S A$gpio$946 Def00E5
S A$gpio$928 Def00E0
S A$gpio$919 Def00D5
S A$gpio$892 Def00A9
S A$gpio$883 Def009B
S A$gpio$874 Def008D
S A$gpio$865 Def0080
S A$gpio$847 Def0061
S A$gpio$838 Def0053
S A$gpio$775 Def0011
S C$gpio.c$60$1$1 Def02D8
S A$gpio$956 Def00F2
S A$gpio$893 Def00AB
S A$gpio$884 Def009D
S A$gpio$875 Def0090
S A$gpio$857 Def0071
S A$gpio$848 Def0063
S A$gpio$839 Def0055
S A$gpio$776 Def0013
S A$gpio$767 Def0007
S C$gpio.c$52$1$1 Def02CD
S C$gpio.c$43$1$1 Def00E3
S C$gpio.c$36$0$0 Def0000
S A$gpio$957 Def00F4
S A$gpio$948 Def00E8
S A$gpio$894 Def00AD
S A$gpio$885 Def00A0
S A$gpio$867 Def0081
S A$gpio$858 Def0073
S A$gpio$849 Def0065
S A$gpio$777 Def0014
S A$gpio$768 Def0009
S C$gpio.c$62$1$1 Def02E2
S C$gpio.c$44$1$1 Def0246
S A$gpio$958 Def00F5
S A$gpio$949 Def00EA
S A$gpio$895 Def00B0
S A$gpio$877 Def0091
S A$gpio$868 Def0083
S A$gpio$859 Def0075
S A$gpio$778 Def0016
S C$gpio.c$54$1$1 Def02CD
S A$gpio$959 Def00F7
S A$gpio$887 Def00A1
S A$gpio$878 Def0093
S A$gpio$869 Def0085
S C$gpio.c$64$1$1 Def02E3
S C$gpio.c$61$2$3 Def02DF
S C$gpio.c$46$1$1 Def0247
A CONST size 0 flags 20 addr 0
A XINIT size 0 flags 20 addr 0
A CABS size 0 flags 28 addr 0
T 00 00
R 00 00 00 02
T 00 00
R 00 00 00 03
T 00 00
R 00 00 00 04
T 00 00
R 00 00 00 05
T 00 00
R 00 00 00 05
T 00 00
R 00 00 00 18
T 00 00 AA 82 74 18 B5 02 00
R 00 00 00 18
T 00 07
R 00 00 00 18
T 00 07 50 01 22
R 00 00 00 18
T 00 0A
R 00 00 00 18
T 00 0A EA 24 09 83 C0 E0 EA 24 1C 83 C0 E0 22
R 00 00 00 18
T 00 17
R 00 00 00 18
T 00 17 00 00 49 00 00 51
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 19 00 00 59 00 00 61
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 1B 00 00 69 00 00 71
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 1D 00 00 E0 00 00 E0
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 1F 00 00 E0 00 00 E0
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 21 00 00 79 00 00 81
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 23 00 00 89 00 00 91
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 25 00 00 99 00 00 A1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 27 00 00 A9 00 00 B1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 29 00 00 E0 00 00 E0
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 2B 00 00 B9 00 00 C1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 2D 00 00 C9 00 00 D1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 2F 00 00 D9
R 00 00 00 18 F1 01 02 00 18
T 00 30
R 00 00 00 18
T 00 30 00 00 49 00 00 51
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 32 00 00 59 00 00 61
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 34 00 00 69 00 00 71
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 36 00 00 E0 00 00 E0
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 38 00 00 E0 00 00 E0
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 3A 00 00 79 00 00 81
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 3C 00 00 89 00 00 91
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 3E 00 00 99 00 00 A1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 40 00 00 A9 00 00 B1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 42 00 00 E0 00 00 E0
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 44 00 00 B9 00 00 C1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 46 00 00 C9 00 00 D1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 00 48 00 00 D9
R 00 00 00 18 F1 81 02 00 18
T 00 49
R 00 00 00 18
T 00 49 A2 00 80 00 92 80 43 FD 01 22
R 00 00 00 18 F5 29 03 00 05
T 00 51
R 00 00 00 18
T 00 51 A2 00 80 00 92 81 43 FD 02 22
R 00 00 00 18 F5 29 03 00 05
T 00 59
R 00 00 00 18
T 00 59 A2 00 80 00 92 82 43 FD 04 22
R 00 00 00 18 F5 29 03 00 05
T 00 61
R 00 00 00 18
T 00 61 A2 00 80 00 92 83 43 FD 08 22
R 00 00 00 18 F5 29 03 00 05
T 00 69
R 00 00 00 18
T 00 69 A2 00 80 00 92 84 43 FD 10 22
R 00 00 00 18 F5 29 03 00 05
T 00 71
R 00 00 00 18
T 00 71 A2 00 80 00 92 85 43 FD 20 22
R 00 00 00 18 F5 29 03 00 05
T 00 79
R 00 00 00 18
T 00 79 A2 00 80 00 92 90 43 FE 01 22
R 00 00 00 18 F5 29 03 00 05
T 00 81
R 00 00 00 18
T 00 81 A2 00 80 00 92 91 43 FE 02 22
R 00 00 00 18 F5 29 03 00 05
T 00 89
R 00 00 00 18
T 00 89 A2 00 80 00 92 92 43 FE 04 22
R 00 00 00 18 F5 29 03 00 05
T 00 91
R 00 00 00 18
T 00 91 A2 00 80 00 92 93 43 FE 08 22
R 00 00 00 18 F5 29 03 00 05
T 00 99
R 00 00 00 18
T 00 99 A2 00 80 00 92 94 43 FE 10 22
R 00 00 00 18 F5 29 03 00 05
T 00 A1
R 00 00 00 18
T 00 A1 A2 00 80 00 92 95 43 FE 20 22
R 00 00 00 18 F5 29 03 00 05
T 00 A9
R 00 00 00 18
T 00 A9 A2 00 80 00 92 96 43 FE 40 22
R 00 00 00 18 F5 29 03 00 05
T 00 B1
R 00 00 00 18
T 00 B1 A2 00 80 00 92 97 43 FE 80 22
R 00 00 00 18 F5 29 03 00 05
T 00 B9
R 00 00 00 18
T 00 B9 A2 00 80 00 92 A0 43 FF 01 22
R 00 00 00 18 F5 29 03 00 05
T 00 C1
R 00 00 00 18
T 00 C1 A2 00 80 00 92 A1 43 FF 02 22
R 00 00 00 18 F5 29 03 00 05
T 00 C9
R 00 00 00 18
T 00 C9 A2 00 80 00 92 A2 43 FF 04 22
R 00 00 00 18 F5 29 03 00 05
T 00 D1
R 00 00 00 18
T 00 D1 A2 00 80 00 92 A3 43 FF 08 22
R 00 00 00 18 F5 29 03 00 05
T 00 D9
R 00 00 00 18
T 00 D9 A2 00 80 00 92 A4 43 FF 10
R 00 00 00 18 F5 29 03 00 05
T 00 E0
R 00 00 00 18
T 00 E0 22
R 00 00 00 18
T 00 E1
R 00 00 00 18
T 00 E1 AA 82 74 18 B5 02 00
R 00 00 00 18
T 00 E8
R 00 00 00 18
T 00 E8 50 01 22
R 00 00 00 18
T 00 EB
R 00 00 00 18
T 00 EB EA 24 09 83 C0 E0 EA 24 1C 83 C0 E0 22
R 00 00 00 18
T 00 F8
R 00 00 00 18
T 00 F8 00 01 2A 00 01 39
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 FA 00 01 48 00 01 57
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 FC 00 01 66 00 01 75
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 00 FE 00 02 46 00 02 46
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 00 00 02 46 00 02 46
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 02 00 01 84 00 01 93
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 04 00 01 A2 00 01 B1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 06 00 01 C0 00 01 CF
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 08 00 01 DE 00 01 ED
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 0A 00 02 46 00 02 46
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 0C 00 01 FC 00 02 0B
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 0E 00 02 1A 00 02 29
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 01 10 00 02 38
R 00 00 00 18 F1 01 02 00 18
T 01 11
R 00 00 00 18
T 01 11 00 01 2A 00 01 39
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 13 00 01 48 00 01 57
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 15 00 01 66 00 01 75
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 17 00 02 46 00 02 46
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 19 00 02 46 00 02 46
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 1B 00 01 84 00 01 93
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 1D 00 01 A2 00 01 B1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 1F 00 01 C0 00 01 CF
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 21 00 01 DE 00 01 ED
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 23 00 02 46 00 02 46
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 25 00 01 FC 00 02 0B
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 27 00 02 1A 00 02 29
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 01 29 00 02 38
R 00 00 00 18 F1 81 02 00 18
T 01 2A
R 00 00 00 18
T 01 2A 30 00 80 00 05 53 8F FE 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 32
R 00 00 00 18
T 01 32 43 8F 01
R 00 00 00 18
T 01 35
R 00 00 00 18
T 01 35 53 FD FE 22
R 00 00 00 18
T 01 39
R 00 00 00 18
T 01 39 30 00 80 00 05 53 8F FD 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 41
R 00 00 00 18
T 01 41 43 8F 02
R 00 00 00 18
T 01 44
R 00 00 00 18
T 01 44 53 FD FD 22
R 00 00 00 18
T 01 48
R 00 00 00 18
T 01 48 30 00 80 00 05 53 8F FB 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 50
R 00 00 00 18
T 01 50 43 8F 04
R 00 00 00 18
T 01 53
R 00 00 00 18
T 01 53 53 FD FB 22
R 00 00 00 18
T 01 57
R 00 00 00 18
T 01 57 30 00 80 00 05 53 8F F7 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 5F
R 00 00 00 18
T 01 5F 43 8F 08
R 00 00 00 18
T 01 62
R 00 00 00 18
T 01 62 53 FD F7 22
R 00 00 00 18
T 01 66
R 00 00 00 18
T 01 66 30 00 80 00 05 53 8F EF 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 6E
R 00 00 00 18
T 01 6E 43 8F 10
R 00 00 00 18
T 01 71
R 00 00 00 18
T 01 71 53 FD EF 22
R 00 00 00 18
T 01 75
R 00 00 00 18
T 01 75 30 00 80 00 05 53 8F DF 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 7D
R 00 00 00 18
T 01 7D 43 8F 20
R 00 00 00 18
T 01 80
R 00 00 00 18
T 01 80 53 FD DF 22
R 00 00 00 18
T 01 84
R 00 00 00 18
T 01 84 30 00 80 00 05 53 F6 FE 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 8C
R 00 00 00 18
T 01 8C 43 F6 01
R 00 00 00 18
T 01 8F
R 00 00 00 18
T 01 8F 53 FE FE 22
R 00 00 00 18
T 01 93
R 00 00 00 18
T 01 93 30 00 80 00 05 53 F6 FD 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 9B
R 00 00 00 18
T 01 9B 43 F6 02
R 00 00 00 18
T 01 9E
R 00 00 00 18
T 01 9E 53 FE FD 22
R 00 00 00 18
T 01 A2
R 00 00 00 18
T 01 A2 30 00 80 00 05 53 F6 FB 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 AA
R 00 00 00 18
T 01 AA 43 F6 04
R 00 00 00 18
T 01 AD
R 00 00 00 18
T 01 AD 53 FE FB 22
R 00 00 00 18
T 01 B1
R 00 00 00 18
T 01 B1 30 00 80 00 05 53 F6 F7 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 B9
R 00 00 00 18
T 01 B9 43 F6 08
R 00 00 00 18
T 01 BC
R 00 00 00 18
T 01 BC 53 FE F7 22
R 00 00 00 18
T 01 C0
R 00 00 00 18
T 01 C0 30 00 80 00 05 53 F6 EF 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 C8
R 00 00 00 18
T 01 C8 43 F6 10
R 00 00 00 18
T 01 CB
R 00 00 00 18
T 01 CB 53 FE EF 22
R 00 00 00 18
T 01 CF
R 00 00 00 18
T 01 CF 30 00 80 00 05 53 F6 DF 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 D7
R 00 00 00 18
T 01 D7 43 F6 20
R 00 00 00 18
T 01 DA
R 00 00 00 18
T 01 DA 53 FE DF 22
R 00 00 00 18
T 01 DE
R 00 00 00 18
T 01 DE 30 00 80 00 05 53 F6 BF 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 E6
R 00 00 00 18
T 01 E6 43 F6 40
R 00 00 00 18
T 01 E9
R 00 00 00 18
T 01 E9 53 FE BF 22
R 00 00 00 18
T 01 ED
R 00 00 00 18
T 01 ED 30 00 80 00 05 53 F6 7F 80 03
R 00 00 00 18 F5 29 03 00 05
T 01 F5
R 00 00 00 18
T 01 F5 43 F6 80
R 00 00 00 18
T 01 F8
R 00 00 00 18
T 01 F8 53 FE 7F 22
R 00 00 00 18
T 01 FC
R 00 00 00 18
T 01 FC 30 00 80 00 05 53 F7 FE 80 03
R 00 00 00 18 F5 29 03 00 05
T 02 04
R 00 00 00 18
T 02 04 43 F7 01
R 00 00 00 18
T 02 07
R 00 00 00 18
T 02 07 53 FF FE 22
R 00 00 00 18
T 02 0B
R 00 00 00 18
T 02 0B 30 00 80 00 05 53 F7 FD 80 03
R 00 00 00 18 F5 29 03 00 05
T 02 13
R 00 00 00 18
T 02 13 43 F7 02
R 00 00 00 18
T 02 16
R 00 00 00 18
T 02 16 53 FF FD 22
R 00 00 00 18
T 02 1A
R 00 00 00 18
T 02 1A 30 00 80 00 05 53 F7 FB 80 03
R 00 00 00 18 F5 29 03 00 05
T 02 22
R 00 00 00 18
T 02 22 43 F7 04
R 00 00 00 18
T 02 25
R 00 00 00 18
T 02 25 53 FF FB 22
R 00 00 00 18
T 02 29
R 00 00 00 18
T 02 29 30 00 80 00 05 53 F7 F7 80 03
R 00 00 00 18 F5 29 03 00 05
T 02 31
R 00 00 00 18
T 02 31 43 F7 08
R 00 00 00 18
T 02 34
R 00 00 00 18
T 02 34 53 FF F7 22
R 00 00 00 18
T 02 38
R 00 00 00 18
T 02 38 30 00 80 00 05 53 F7 EF 80 03
R 00 00 00 18 F5 29 03 00 05
T 02 40
R 00 00 00 18
T 02 40 43 F7 10
R 00 00 00 18
T 02 43
R 00 00 00 18
T 02 43 53 FF EF
R 00 00 00 18
T 02 46
R 00 00 00 18
T 02 46 22
R 00 00 00 18
T 02 47
R 00 00 00 18
T 02 47 AA 82 74 18 B5 02 00
R 00 00 00 18
T 02 4E
R 00 00 00 18
T 02 4E 50 03 02 02 CB
R 00 00 00 18 00 05 00 18
T 02 53
R 00 00 00 18
T 02 53 EA 24 09 83 C0 E0 EA 24 1C 83 C0 E0 22
R 00 00 00 18
T 02 60
R 00 00 00 18
T 02 60 00 02 92 00 02 95
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 62 00 02 98 00 02 9B
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 64 00 02 9E 00 02 A1
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 66 00 02 CB 00 02 CB
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 68 00 02 CB 00 02 CB
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 6A 00 02 A4 00 02 A7
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 6C 00 02 AA 00 02 AD
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 6E 00 02 B0 00 02 B3
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 70 00 02 B6 00 02 B9
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 72 00 02 CB 00 02 CB
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 74 00 02 BC 00 02 BF
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 76 00 02 C2 00 02 C5
R 00 00 00 18 F1 01 02 00 18 F1 01 05 00 18
T 02 78 00 02 C8
R 00 00 00 18 F1 01 02 00 18
T 02 79
R 00 00 00 18
T 02 79 00 02 92 00 02 95
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 7B 00 02 98 00 02 9B
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 7D 00 02 9E 00 02 A1
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 7F 00 02 CB 00 02 CB
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 81 00 02 CB 00 02 CB
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 83 00 02 A4 00 02 A7
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 85 00 02 AA 00 02 AD
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 87 00 02 B0 00 02 B3
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 89 00 02 B6 00 02 B9
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 8B 00 02 CB 00 02 CB
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 8D 00 02 BC 00 02 BF
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 8F 00 02 C2 00 02 C5
R 00 00 00 18 F1 81 02 00 18 F1 81 05 00 18
T 02 91 00 02 C8
R 00 00 00 18 F1 81 02 00 18
T 02 92
R 00 00 00 18
T 02 92 A2 80 22
R 00 00 00 18
T 02 95
R 00 00 00 18
T 02 95 A2 81 22
R 00 00 00 18
T 02 98
R 00 00 00 18
T 02 98 A2 82 22
R 00 00 00 18
T 02 9B
R 00 00 00 18
T 02 9B A2 83 22
R 00 00 00 18
T 02 9E
R 00 00 00 18
T 02 9E A2 84 22
R 00 00 00 18
T 02 A1
R 00 00 00 18
T 02 A1 A2 85 22
R 00 00 00 18
T 02 A4
R 00 00 00 18
T 02 A4 A2 90 22
R 00 00 00 18
T 02 A7
R 00 00 00 18
T 02 A7 A2 91 22
R 00 00 00 18
T 02 AA
R 00 00 00 18
T 02 AA A2 92 22
R 00 00 00 18
T 02 AD
R 00 00 00 18
T 02 AD A2 93 22
R 00 00 00 18
T 02 B0
R 00 00 00 18
T 02 B0 A2 94 22
R 00 00 00 18
T 02 B3
R 00 00 00 18
T 02 B3 A2 95 22
R 00 00 00 18
T 02 B6
R 00 00 00 18
T 02 B6 A2 96 22
R 00 00 00 18
T 02 B9
R 00 00 00 18
T 02 B9 A2 97 22
R 00 00 00 18
T 02 BC
R 00 00 00 18
T 02 BC A2 A0 22
R 00 00 00 18
T 02 BF
R 00 00 00 18
T 02 BF A2 A1 22
R 00 00 00 18
T 02 C2
R 00 00 00 18
T 02 C2 A2 A2 22
R 00 00 00 18
T 02 C5
R 00 00 00 18
T 02 C5 A2 A3 22
R 00 00 00 18
T 02 C8
R 00 00 00 18
T 02 C8 A2 A4 22
R 00 00 00 18
T 02 CB
R 00 00 00 18
T 02 CB C3 22
R 00 00 00 18
T 02 CD
R 00 00 00 18
T 02 CD 30 00 80 00 04 53 F7 DF 22
R 00 00 00 18 F5 29 03 00 05
T 02 D4
R 00 00 00 18
T 02 D4 43 F7 20 22
R 00 00 00 18
T 02 D8
R 00 00 00 18
T 02 D8 30 00 80 00 04 53 F7 BF 22
R 00 00 00 18 F5 29 03 00 05
T 02 DF
R 00 00 00 18
T 02 DF 43 F7 40 22
R 00 00 00 18
T 02 E3
R 00 00 00 18
T 02 E3 30 00 80 00 04 53 F7 7F 22
R 00 00 00 18 F5 29 03 00 05
T 02 EA
R 00 00 00 18
T 02 EA 43 F7 80 22
R 00 00 00 18
M:gpio
F:G$setDigitalOutput$0$0({2}DF,SV:S),Z,0,0,0,0,0
S:LsetDigitalOutput$value$1$1({1}SB0$1:U),R,0,0,[b0]
S:LsetDigitalOutput$pinNumber$1$1({1}SC:U),R,0,0,[r2]
F:G$setDigitalInput$0$0({2}DF,SV:S),Z,0,0,0,0,0
S:LsetDigitalInput$pulled$1$1({1}SB0$1:U),R,0,0,[b0]
S:LsetDigitalInput$pinNumber$1$1({1}SC:U),R,0,0,[r2]
F:G$isPinHigh$0$0({2}DF,SB0$1:U),Z,0,0,0,0,0
S:LisPinHigh$pinNumber$1$1({1}SC:U),R,0,0,[r2]
F:G$setPort0PullType$0$0({2}DF,SV:S),Z,0,0,0,0,0
S:LsetPort0PullType$pullType$1$1({1}SB0$1:U),R,0,0,[b0]
F:G$setPort1PullType$0$0({2}DF,SV:S),Z,0,0,0,0,0
S:LsetPort1PullType$pullType$1$1({1}SB0$1:U),R,0,0,[b0]
F:G$setPort2PullType$0$0({2}DF,SV:S),Z,0,0,0,0,0
S:LsetPort2PullType$pullType$1$1({1}SB0$1:U),R,0,0,[b0]
T:Fgpio$__00010000[({0}S:S$SRCADDRH$0$0({1}SC:U),Z,0,0)({1}S:S$SRCADDRL$0$0({1}SC:U),Z,0,0)({2}S:S$DESTADDRH$0$0({1}SC:U),Z,0,0)({3}S:S$DESTADDRL$0$0({1}SC:U),Z,0,0)({4}S:S$VLEN_LENH$0$0({1}SC:U),Z,0,0)({5}S:S$LENL$0$0({1}SC:U),Z,0,0)({6}S:S$DC6$0$0({1}
SC:U),Z,0,0)({7}S:S$DC7$0$0({1}SC:U),Z,0,0)]
S:Fgpio$SYNC1$0$0({1}SC:U),F,0,0
S:Fgpio$SYNC0$0$0({1}SC:U),F,0,0
S:Fgpio$PKTLEN$0$0({1}SC:U),F,0,0
S:Fgpio$PKTCTRL1$0$0({1}SC:U),F,0,0
S:Fgpio$PKTCTRL0$0$0({1}SC:U),F,0,0
S:Fgpio$ADDR$0$0({1}SC:U),F,0,0
S:Fgpio$CHANNR$0$0({1}SC:U),F,0,0
S:Fgpio$FSCTRL1$0$0({1}SC:U),F,0,0
S:Fgpio$FSCTRL0$0$0({1}SC:U),F,0,0
S:Fgpio$FREQ2$0$0({1}SC:U),F,0,0
S:Fgpio$FREQ1$0$0({1}SC:U),F,0,0
S:Fgpio$FREQ0$0$0({1}SC:U),F,0,0
S:Fgpio$MDMCFG4$0$0({1}SC:U),F,0,0
S:Fgpio$MDMCFG3$0$0({1}SC:U),F,0,0
S:Fgpio$MDMCFG2$0$0({1}SC:U),F,0,0
S:Fgpio$MDMCFG1$0$0({1}SC:U),F,0,0
S:Fgpio$MDMCFG0$0$0({1}SC:U),F,0,0
S:Fgpio$DEVIATN$0$0({1}SC:U),F,0,0
S:Fgpio$MCSM2$0$0({1}SC:U),F,0,0
S:Fgpio$MCSM1$0$0({1}SC:U),F,0,0
S:Fgpio$MCSM0$0$0({1}SC:U),F,0,0
S:Fgpio$FOCCFG$0$0({1}SC:U),F,0,0
S:Fgpio$BSCFG$0$0({1}SC:U),F,0,0
S:Fgpio$AGCCTRL2$0$0({1}SC:U),F,0,0
S:Fgpio$AGCCTRL1$0$0({1}SC:U),F,0,0
S:Fgpio$AGCCTRL0$0$0({1}SC:U),F,0,0
S:Fgpio$FREND1$0$0({1}SC:U),F,0,0
S:Fgpio$FREND0$0$0({1}SC:U),F,0,0
S:Fgpio$FSCAL3$0$0({1}SC:U),F,0,0
S:Fgpio$FSCAL2$0$0({1}SC:U),F,0,0
S:Fgpio$FSCAL1$0$0({1}SC:U),F,0,0
S:Fgpio$FSCAL0$0$0({1}SC:U),F,0,0
S:Fgpio$TEST2$0$0({1}SC:U),F,0,0
S:Fgpio$TEST1$0$0({1}SC:U),F,0,0
S:Fgpio$TEST0$0$0({1}SC:U),F,0,0
S:Fgpio$PA_TABLE0$0$0({1}SC:U),F,0,0
S:Fgpio$IOCFG2$0$0({1}SC:U),F,0,0
S:Fgpio$IOCFG1$0$0({1}SC:U),F,0,0
S:Fgpio$IOCFG0$0$0({1}SC:U),F,0,0
S:Fgpio$PARTNUM$0$0({1}SC:U),F,0,0
S:Fgpio$VERSION$0$0({1}SC:U),F,0,0
S:Fgpio$FREQEST$0$0({1}SC:U),F,0,0
S:Fgpio$LQI$0$0({1}SC:U),F,0,0
S:Fgpio$RSSI$0$0({1}SC:U),F,0,0
S:Fgpio$MARCSTATE$0$0({1}SC:U),F,0,0
S:Fgpio$PKTSTATUS$0$0({1}SC:U),F,0,0
S:Fgpio$VCO_VC_DAC$0$0({1}SC:U),F,0,0
S:Fgpio$I2SCFG0$0$0({1}SC:U),F,0,0
S:Fgpio$I2SCFG1$0$0({1}SC:U),F,0,0
S:Fgpio$I2SDATL$0$0({1}SC:U),F,0,0
S:Fgpio$I2SDATH$0$0({1}SC:U),F,0,0
S:Fgpio$I2SWCNT$0$0({1}SC:U),F,0,0
S:Fgpio$I2SSTAT$0$0({1}SC:U),F,0,0
S:Fgpio$I2SCLKF0$0$0({1}SC:U),F,0,0
S:Fgpio$I2SCLKF1$0$0({1}SC:U),F,0,0
S:Fgpio$I2SCLKF2$0$0({1}SC:U),F,0,0
S:Fgpio$USBADDR$0$0({1}SC:U),F,0,0
S:Fgpio$USBPOW$0$0({1}SC:U),F,0,0
S:Fgpio$USBIIF$0$0({1}SC:U),F,0,0
S:Fgpio$USBOIF$0$0({1}SC:U),F,0,0
S:Fgpio$USBCIF$0$0({1}SC:U),F,0,0
S:Fgpio$USBIIE$0$0({1}SC:U),F,0,0
S:Fgpio$USBOIE$0$0({1}SC:U),F,0,0
S:Fgpio$USBCIE$0$0({1}SC:U),F,0,0
S:Fgpio$USBFRML$0$0({1}SC:U),F,0,0
S:Fgpio$USBFRMH$0$0({1}SC:U),F,0,0
S:Fgpio$USBINDEX$0$0({1}SC:U),F,0,0
S:Fgpio$USBMAXI$0$0({1}SC:U),F,0,0
S:Fgpio$USBCSIL$0$0({1}SC:U),F,0,0
S:Fgpio$USBCSIH$0$0({1}SC:U),F,0,0
S:Fgpio$USBMAXO$0$0({1}SC:U),F,0,0
S:Fgpio$USBCSOL$0$0({1}SC:U),F,0,0
S:Fgpio$USBCSOH$0$0({1}SC:U),F,0,0
S:Fgpio$USBCNTL$0$0({1}SC:U),F,0,0
S:Fgpio$USBCNTH$0$0({1}SC:U),F,0,0
S:Fgpio$USBF0$0$0({1}SC:U),F,0,0
S:Fgpio$USBF1$0$0({1}SC:U),F,0,0
S:Fgpio$USBF2$0$0({1}SC:U),F,0,0
S:Fgpio$USBF3$0$0({1}SC:U),F,0,0
S:Fgpio$USBF4$0$0({1}SC:U),F,0,0
S:Fgpio$USBF5$0$0({1}SC:U),F,0,0
S:Fgpio$P0$0$0({1}SC:U),I,0,0
S:Fgpio$SP$0$0({1}SC:U),I,0,0
S:Fgpio$DPL0$0$0({1}SC:U),I,0,0
S:Fgpio$DPH0$0$0({1}SC:U),I,0,0
S:Fgpio$DPL1$0$0({1}SC:U),I,0,0
S:Fgpio$DPH1$0$0({1}SC:U),I,0,0
S:Fgpio$U0CSR$0$0({1}SC:U),I,0,0
S:Fgpio$PCON$0$0({1}SC:U),I,0,0
S:Fgpio$TCON$0$0({1}SC:U),I,0,0
S:Fgpio$P0IFG$0$0({1}SC:U),I,0,0
S:Fgpio$P1IFG$0$0({1}SC:U),I,0,0
S:Fgpio$P2IFG$0$0({1}SC:U),I,0,0
S:Fgpio$PICTL$0$0({1}SC:U),I,0,0
S:Fgpio$P1IEN$0$0({1}SC:U),I,0,0
S:Fgpio$P0INP$0$0({1}SC:U),I,0,0
S:Fgpio$P1$0$0({1}SC:U),I,0,0
S:Fgpio$RFIM$0$0({1}SC:U),I,0,0
S:Fgpio$DPS$0$0({1}SC:U),I,0,0
S:Fgpio$MPAGE$0$0({1}SC:U),I,0,0
S:Fgpio$ENDIAN$0$0({1}SC:U),I,0,0
S:Fgpio$S0CON$0$0({1}SC:U),I,0,0
S:Fgpio$IEN2$0$0({1}SC:U),I,0,0
S:Fgpio$S1CON$0$0({1}SC:U),I,0,0
S:Fgpio$T2CT$0$0({1}SC:U),I,0,0
S:Fgpio$T2PR$0$0({1}SC:U),I,0,0
S:Fgpio$T2CTL$0$0({1}SC:U),I,0,0
S:Fgpio$P2$0$0({1}SC:U),I,0,0
S:Fgpio$WORIRQ$0$0({1}SC:U),I,0,0
S:Fgpio$WORCTRL$0$0({1}SC:U),I,0,0
S:Fgpio$WOREVT0$0$0({1}SC:U),I,0,0
S:Fgpio$WOREVT1$0$0({1}SC:U),I,0,0
S:Fgpio$WORTIME0$0$0({1}SC:U),I,0,0
S:Fgpio$WORTIME1$0$0({1}SC:U),I,0,0
S:Fgpio$IEN0$0$0({1}SC:U),I,0,0
S:Fgpio$IP0$0$0({1}SC:U),I,0,0
S:Fgpio$FWT$0$0({1}SC:U),I,0,0
S:Fgpio$FADDRL$0$0({1}SC:U),I,0,0
S:Fgpio$FADDRH$0$0({1}SC:U),I,0,0
S:Fgpio$FCTL$0$0({1}SC:U),I,0,0
S:Fgpio$FWDATA$0$0({1}SC:U),I,0,0
S:Fgpio$ENCDI$0$0({1}SC:U),I,0,0
S:Fgpio$ENCDO$0$0({1}SC:U),I,0,0
S:Fgpio$ENCCS$0$0({1}SC:U),I,0,0
S:Fgpio$ADCCON1$0$0({1}SC:U),I,0,0
S:Fgpio$ADCCON2$0$0({1}SC:U),I,0,0
S:Fgpio$ADCCON3$0$0({1}SC:U),I,0,0
S:Fgpio$IEN1$0$0({1}SC:U),I,0,0
S:Fgpio$IP1$0$0({1}SC:U),I,0,0
S:Fgpio$ADCL$0$0({1}SC:U),I,0,0
S:Fgpio$ADCH$0$0({1}SC:U),I,0,0
S:Fgpio$RNDL$0$0({1}SC:U),I,0,0
S:Fgpio$RNDH$0$0({1}SC:U),I,0,0
S:Fgpio$SLEEP$0$0({1}SC:U),I,0,0
S:Fgpio$IRCON$0$0({1}SC:U),I,0,0
S:Fgpio$U0DBUF$0$0({1}SC:U),I,0,0
S:Fgpio$U0BAUD$0$0({1}SC:U),I,0,0
S:Fgpio$U0UCR$0$0({1}SC:U),I,0,0
S:Fgpio$U0GCR$0$0({1}SC:U),I,0,0
S:Fgpio$CLKCON$0$0({1}SC:U),I,0,0
S:Fgpio$MEMCTR$0$0({1}SC:U),I,0,0
S:Fgpio$WDCTL$0$0({1}SC:U),I,0,0
S:Fgpio$T3CNT$0$0({1}SC:U),I,0,0
S:Fgpio$T3CTL$0$0({1}SC:U),I,0,0
S:Fgpio$T3CCTL0$0$0({1}SC:U),I,0,0
S:Fgpio$T3CC0$0$0({1}SC:U),I,0,0
S:Fgpio$T3CCTL1$0$0({1}SC:U),I,0,0
S:Fgpio$T3CC1$0$0({1}SC:U),I,0,0
S:Fgpio$PSW$0$0({1}SC:U),I,0,0
S:Fgpio$DMAIRQ$0$0({1}SC:U),I,0,0
S:Fgpio$DMA1CFGL$0$0({1}SC:U),I,0,0
S:Fgpio$DMA1CFGH$0$0({1}SC:U),I,0,0
S:Fgpio$DMA0CFGL$0$0({1}SC:U),I,0,0
S:Fgpio$DMA0CFGH$0$0({1}SC:U),I,0,0
S:Fgpio$DMAARM$0$0({1}SC:U),I,0,0
S:Fgpio$DMAREQ$0$0({1}SC:U),I,0,0
S:Fgpio$TIMIF$0$0({1}SC:U),I,0,0
S:Fgpio$RFD$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC0L$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC0H$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC1L$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC1H$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC2L$0$0({1}SC:U),I,0,0
S:Fgpio$T1CC2H$0$0({1}SC:U),I,0,0
S:Fgpio$ACC$0$0({1}SC:U),I,0,0
S:Fgpio$RFST$0$0({1}SC:U),I,0,0
S:Fgpio$T1CNTL$0$0({1}SC:U),I,0,0
S:Fgpio$T1CNTH$0$0({1}SC:U),I,0,0
S:Fgpio$T1CTL$0$0({1}SC:U),I,0,0
S:Fgpio$T1CCTL0$0$0({1}SC:U),I,0,0
S:Fgpio$T1CCTL1$0$0({1}SC:U),I,0,0
S:Fgpio$T1CCTL2$0$0({1}SC:U),I,0,0
S:Fgpio$IRCON2$0$0({1}SC:U),I,0,0
S:Fgpio$RFIF$0$0({1}SC:U),I,0,0
S:Fgpio$T4CNT$0$0({1}SC:U),I,0,0
S:Fgpio$T4CTL$0$0({1}SC:U),I,0,0
S:Fgpio$T4CCTL0$0$0({1}SC:U),I,0,0
S:Fgpio$T4CC0$0$0({1}SC:U),I,0,0
S:Fgpio$T4CCTL1$0$0({1}SC:U),I,0,0
S:Fgpio$T4CC1$0$0({1}SC:U),I,0,0
S:Fgpio$B$0$0({1}SC:U),I,0,0
S:Fgpio$PERCFG$0$0({1}SC:U),I,0,0
S:Fgpio$ADCCFG$0$0({1}SC:U),I,0,0
S:Fgpio$P0SEL$0$0({1}SC:U),I,0,0
S:Fgpio$P1SEL$0$0({1}SC:U),I,0,0
S:Fgpio$P2SEL$0$0({1}SC:U),I,0,0
S:Fgpio$P1INP$0$0({1}SC:U),I,0,0
S:Fgpio$P2INP$0$0({1}SC:U),I,0,0
S:Fgpio$U1CSR$0$0({1}SC:U),I,0,0
S:Fgpio$U1DBUF$0$0({1}SC:U),I,0,0
S:Fgpio$U1BAUD$0$0({1}SC:U),I,0,0
S:Fgpio$U1UCR$0$0({1}SC:U),I,0,0
S:Fgpio$U1GCR$0$0({1}SC:U),I,0,0
S:Fgpio$P0DIR$0$0({1}SC:U),I,0,0
S:Fgpio$P1DIR$0$0({1}SC:U),I,0,0
S:Fgpio$P2DIR$0$0({1}SC:U),I,0,0
S:Fgpio$DMA0CFG$0$0({2}SI:U),I,0,0
S:Fgpio$DMA1CFG$0$0({2}SI:U),I,0,0
S:Fgpio$FADDR$0$0({2}SI:U),I,0,0
S:Fgpio$ADC$0$0({2}SI:U),I,0,0
S:Fgpio$T1CC0$0$0({2}SI:U),I,0,0
S:Fgpio$T1CC1$0$0({2}SI:U),I,0,0
S:Fgpio$T1CC2$0$0({2}SI:U),I,0,0
S:Fgpio$P0_0$0$0({1}SX:U),J,0,0
S:Fgpio$P0_1$0$0({1}SX:U),J,0,0
S:Fgpio$P0_2$0$0({1}SX:U),J,0,0
S:Fgpio$P0_3$0$0({1}SX:U),J,0,0
S:Fgpio$P0_4$0$0({1}SX:U),J,0,0
S:Fgpio$P0_5$0$0({1}SX:U),J,0,0
S:Fgpio$P0_6$0$0({1}SX:U),J,0,0
S:Fgpio$P0_7$0$0({1}SX:U),J,0,0
S:Fgpio$_TCON_0$0$0({1}SX:U),J,0,0
S:Fgpio$RFTXRXIF$0$0({1}SX:U),J,0,0
S:Fgpio$_TCON_2$0$0({1}SX:U),J,0,0
S:Fgpio$URX0IF$0$0({1}SX:U),J,0,0
S:Fgpio$_TCON_4$0$0({1}SX:U),J,0,0
S:Fgpio$ADCIF$0$0({1}SX:U),J,0,0
S:Fgpio$_TCON_6$0$0({1}SX:U),J,0,0
S:Fgpio$URX1IF$0$0({1}SX:U),J,0,0
S:Fgpio$P1_0$0$0({1}SX:U),J,0,0
S:Fgpio$P1_1$0$0({1}SX:U),J,0,0
S:Fgpio$P1_2$0$0({1}SX:U),J,0,0
S:Fgpio$P1_3$0$0({1}SX:U),J,0,0
S:Fgpio$P1_4$0$0({1}SX:U),J,0,0
S:Fgpio$P1_5$0$0({1}SX:U),J,0,0
S:Fgpio$P1_6$0$0({1}SX:U),J,0,0
S:Fgpio$P1_7$0$0({1}SX:U),J,0,0
S:Fgpio$ENCIF_0$0$0({1}SX:U),J,0,0
S:Fgpio$ENCIF_1$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON2$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON3$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON4$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON5$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON6$0$0({1}SX:U),J,0,0
S:Fgpio$_SOCON7$0$0({1}SX:U),J,0,0
S:Fgpio$P2_0$0$0({1}SX:U),J,0,0
S:Fgpio$P2_1$0$0({1}SX:U),J,0,0
S:Fgpio$P2_2$0$0({1}SX:U),J,0,0
S:Fgpio$P2_3$0$0({1}SX:U),J,0,0
S:Fgpio$P2_4$0$0({1}SX:U),J,0,0
S:Fgpio$P2_5$0$0({1}SX:U),J,0,0
S:Fgpio$P2_6$0$0({1}SX:U),J,0,0
S:Fgpio$P2_7$0$0({1}SX:U),J,0,0
S:Fgpio$RFTXRXIE$0$0({1}SX:U),J,0,0
S:Fgpio$ADCIE$0$0({1}SX:U),J,0,0
S:Fgpio$URX0IE$0$0({1}SX:U),J,0,0
S:Fgpio$URX1IE$0$0({1}SX:U),J,0,0
S:Fgpio$ENCIE$0$0({1}SX:U),J,0,0
S:Fgpio$STIE$0$0({1}SX:U),J,0,0
S:Fgpio$_IEN06$0$0({1}SX:U),J,0,0
S:Fgpio$EA$0$0({1}SX:U),J,0,0
S:Fgpio$DMAIE$0$0({1}SX:U),J,0,0
S:Fgpio$T1IE$0$0({1}SX:U),J,0,0
S:Fgpio$T2IE$0$0({1}SX:U),J,0,0
S:Fgpio$T3IE$0$0({1}SX:U),J,0,0
S:Fgpio$T4IE$0$0({1}SX:U),J,0,0
S:Fgpio$P0IE$0$0({1}SX:U),J,0,0
S:Fgpio$_IEN16$0$0({1}SX:U),J,0,0
S:Fgpio$_IEN17$0$0({1}SX:U),J,0,0
S:Fgpio$DMAIF$0$0({1}SX:U),J,0,0
S:Fgpio$T1IF$0$0({1}SX:U),J,0,0
S:Fgpio$T2IF$0$0({1}SX:U),J,0,0
S:Fgpio$T3IF$0$0({1}SX:U),J,0,0
S:Fgpio$T4IF$0$0({1}SX:U),J,0,0
S:Fgpio$P0IF$0$0({1}SX:U),J,0,0
S:Fgpio$_IRCON6$0$0({1}SX:U),J,0,0
S:Fgpio$STIF$0$0({1}SX:U),J,0,0
S:Fgpio$P$0$0({1}SX:U),J,0,0
S:Fgpio$F1$0$0({1}SX:U),J,0,0
S:Fgpio$OV$0$0({1}SX:U),J,0,0
S:Fgpio$RS0$0$0({1}SX:U),J,0,0
S:Fgpio$RS1$0$0({1}SX:U),J,0,0
S:Fgpio$F0$0$0({1}SX:U),J,0,0
S:Fgpio$AC$0$0({1}SX:U),J,0,0
S:Fgpio$CY$0$0({1}SX:U),J,0,0
S:Fgpio$T3OVFIF$0$0({1}SX:U),J,0,0
S:Fgpio$T3CH0IF$0$0({1}SX:U),J,0,0
S:Fgpio$T3CH1IF$0$0({1}SX:U),J,0,0
S:Fgpio$T4OVFIF$0$0({1}SX:U),J,0,0
S:Fgpio$T4CH0IF$0$0({1}SX:U),J,0,0
S:Fgpio$T4CH1IF$0$0({1}SX:U),J,0,0
S:Fgpio$OVFIM$0$0({1}SX:U),J,0,0
S:Fgpio$_TIMIF7$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_0$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_1$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_2$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_3$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_4$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_5$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_6$0$0({1}SX:U),J,0,0
S:Fgpio$ACC_7$0$0({1}SX:U),J,0,0
S:Fgpio$P2IF$0$0({1}SX:U),J,0,0
S:Fgpio$UTX0IF$0$0({1}SX:U),J,0,0
S:Fgpio$UTX1IF$0$0({1}SX:U),J,0,0
S:Fgpio$P1IF$0$0({1}SX:U),J,0,0
S:Fgpio$WDTIF$0$0({1}SX:U),J,0,0
S:Fgpio$_IRCON25$0$0({1}SX:U),J,0,0
S:Fgpio$_IRCON26$0$0({1}SX:U),J,0,0
S:Fgpio$_IRCON27$0$0({1}SX:U),J,0,0
S:Fgpio$B_0$0$0({1}SX:U),J,0,0
S:Fgpio$B_1$0$0({1}SX:U),J,0,0
S:Fgpio$B_2$0$0({1}SX:U),J,0,0
S:Fgpio$B_3$0$0({1}SX:U),J,0,0
S:Fgpio$B_4$0$0({1}SX:U),J,0,0
S:Fgpio$B_5$0$0({1}SX:U),J,0,0
S:Fgpio$B_6$0$0({1}SX:U),J,0,0
S:Fgpio$B_7$0$0({1}SX:U),J,0,0
S:Fgpio$U1ACTIVE$0$0({1}SX:U),J,0,0
S:Fgpio$U1TX_BYTE$0$0({1}SX:U),J,0,0
S:Fgpio$U1RX_BYTE$0$0({1}SX:U),J,0,0
S:Fgpio$U1ERR$0$0({1}SX:U),J,0,0
S:Fgpio$U1FE$0$0({1}SX:U),J,0,0
S:Fgpio$U1SLAVE$0$0({1}SX:U),J,0,0
S:Fgpio$U1RE$0$0({1}SX:U),J,0,0
S:Fgpio$U1MODE$0$0({1}SX:U),J,0,0