/***************************************************************
*                 CANFunctions                                 *
****************************************************************
*     Created:  10/11/2002 (dd/mm/yyyy)                        *
****************************************************************
*     Created by:  Jose Sanchez and Ben Fine                   *
*     email: joseos@okstate.edu                                *
*     Telephone:  405 744 4669                                 *
*  This program is property of Jose Sanchez and Ben Fine       *
*  The code contained in this file could be distribuited and   *
*  used freely with the proper acreditation.                   *
****************************************************************/

#ifndef CANFUNCTIONS_H
#define CANFUNCTIONS_H

#RESERVE  0x051:0x05D // don't use this RAM. See Microchip errata 80161 rev F. --dgi 28jan2005

/*Defines needed by my project*/

#BYTE CANCON=0xF6F
#BYTE CANSTAT=0xF6E
#BYTE COMSTAT=0xF74

/*Transmit registers*/

#BYTE TXB0CON=   0xF40
#BIT TXB0CON_TXREQ=0xF40.3

#BYTE TXB1CON=   0xF30
#BIT TXB1CON_TXREQ=0xF30.3

#BYTE TXB2CON=   0xF20
#BIT TXB2CON_TXREQ=0xF20.3

#BYTE TXB0SIDH=  0xF41
#BYTE TXB1SIDH=  0xF31
#BYTE TXB2SIDH=  0xF21

#BYTE TXB0SIDL=  0xF42
#BYTE TXB1SIDL=  0xF32
#BYTE TXB2SIDL=  0xF22

#BYTE TXB0EIDH=  0xF43
#BYTE TXB1EIDH=  0xF33
#BYTE TXB2EIDH=  0xF23

#BYTE TXB0EIDL=  0xF44
#BYTE TXB1EIDL=  0xF34
#BYTE TXB2EIDL=  0xF24

#define TXB0D0    0xF46
#define TXB0D1    0xF47
#define TXB0D2    0xF48
#define TXB0D3    0xF49
#define TXB0D4    0xF4A
#define TXB0D5    0xF4B
#define TXB0D6    0xF4C
#define TXB0D7    0xF4D

#define TXB1D0    0xF36
#define TXB1D1    0xF37
#define TXB1D2    0xF38
#define TXB1D3    0xF39
#define TXB1D4    0xF3A
#define TXB1D5    0xF3B
#define TXB1D6    0xF3C
#define TXB1D7    0xF3D

#define TXB2D0    0xF26
#define TXB2D1    0xF27
#define TXB2D2    0xF28
#define TXB2D3    0xF29
#define TXB2D4    0xF2A
#define TXB2D5    0xF2B
#define TXB2D6    0xF2C
#define TXB2D7    0xF2D

#BYTE TXB0DLC=   0xF45
#BYTE TXB1DLC=   0xF35
#BYTE TXB2DLC=   0xF25

#BYTE TXERRCNT=  0xF76

/*CAN BAUD RATE REGISTERS*/

#BYTE BRGCON1=   0xF70
#BYTE BRGCON2=   0xF71
/*Special bit from this register*/
#BIT BRGCON2_SAM=0xF71.6
#BIT BRGCON2_SEG2PHTS=0xF71.7

#BYTE BRGCON3=   0xF72
/*Special bit from this register*/
#BIT BRGCON3_WAKFIL=0xF72.6

#BYTE CIOCON =   0xF73
#BIT  ENDRHI =   0xF73.5

#BYTE PIR3=      0xFA4
#BIT PIR3_RXB0IF= 0xFA4.0
#BIT PIR3_RXB1IF= 0xFA4.1
#BIT PIR3_TXB0IF= 0xFA4.2
#BIT PIR3_TXB1IF= 0xFA4.3
#BIT PIR3_TXB2IF= 0xFA4.4
#BIT PIR3_IRXIF=0xFA4.7

#BYTE PIE3=      0xFA3
#BIT TXB0IE = 0xFA3.2

#BYTE IPR3=      0xFA5

/*Receive Registers*/

#BYTE RXERRCNT=  0xF75

#define RXB0CON   0xF60
#BIT RXB0CON_RXFUL=  0xF60.7
#BIT RXB0CON_RXB0DBEN=  0xF60.2

#BIT RXB1IE= 0xFA3.1
#define RXB1CON   0xF50
#BIT RXB1CON_RXFUL=  0xF50.7

#BIT COMSTAT_RXB0OVFL= 0xF74.7
#BIT COMSTAT_RXB1OVFL= 0xF74.6

#define RXB0DLC 0xF65
#BIT RXB0DLC_RXRTR= 0xF65.6

#define RXM0SIDH 0xF18
#define RXM0SIDL  0xF19
#define RXM0EIDH  0xF1A
#define RXM0EIDL  0xF1B

#define RXM1SIDH 0xF1C
#define RXM1SIDL  0xF1D
#define RXM1EIDH  0xF1E
#define RXM1EIDL  0xF1F


#define RXF0SIDH  0xF00
#define RXF0SIDL  0xF01
#define RXF0EIDH  0xF02
#define RXF0EIDL  0xF03

#define RXF1SIDH  0xF04
#define RXF1SIDL  0xF05
#define RXF1EIDH  0xF06
#define RXF1EIDL  0xF07

#define RXF2SIDH  0xF08
#define RXF2SIDL  0xF09
#define RXF2EIDH  0xF0A
#define RXF2EIDL  0xF0B

#define RXF3SIDH  0xF0C
#define RXF3SIDL  0xF0D
#define RXF3EIDH  0xF0E
#define RXF3EIDL  0xF0F

#define RXF4SIDH  0xF10
#define RXF4SIDL  0xF11
#define RXF4EIDH  0xF12
#define RXF4EIDL  0xF13

#define RXF5SIDH  0xF14
#define RXF5SIDL  0xF15
#define RXF5EIDH  0xF16
#define RXF5EIDL  0xF17

/*definitions receive buffer 0*/
#define RXB0SIDH 0xF61
#define RXB0SIDL 0xF62
#define RXB0EIDH 0xF63
#define RXB0EIDL 0xF64
#BIT RXB0SIDL_EXID=0xF62.3

#define RXB0D0 0xF66
#define RXB0D1 0xF67
#define RXB0D2 0xF68
#define RXB0D3 0xF69
#define RXB0D4 0xF6A
#define RXB0D5 0xF6B
#define RXB0D6 0xF6C
#define RXB0D7 0xF6D

/*definitions receive buffer 1*/
#define RXB1DLC 0xF55
#BIT RXB1DLC_RXRTR= 0xF55.6

#define RXB1SIDL 0xF52
#BIT RXB1SIDL_EXID=0xF52.3

#define RXB1SIDH 0xF51
#define RXB1EIDH 0xF53
#define RXB1EIDL 0xF54

#define RXB1D0 0xF56
#define RXB1D1 0xF57
#define RXB1D2 0xF58
#define RXB1D3 0xF59
#define RXB1D4 0xF5A
#define RXB1D5 0xF5B
#define RXB1D6 0xF5C
#define RXB1D7 0xF5D

// tristate register must set B2 to output and B3 to input.

#BYTE TRISB_REG=0xF93

/*********************************************************************
 *
 * enum CAN_TX_MSG_FLAGS
 *
 * This enumeration values define flags related to transmission of a
 * CAN message.  There could be more than one this flag
 * ANDed together to form multiple flags.
 *
 *********************************************************************/
enum CAN_TX_MSG_FLAGS
 {
    CAN_TX_PRIORITY_BITS= 0b00000011,
    CAN_TX_PRIORITY_0   = 0b11111100,   // XXXXXX00
    CAN_TX_PRIORITY_1   = 0b11111101,   // XXXXXX01
    CAN_TX_PRIORITY_2   = 0b11111110,   // XXXXXX10
    CAN_TX_PRIORITY_3   = 0b11111111,   // XXXXXX11

    CAN_TX_FRAME_BIT    = 0b00001000,
    CAN_TX_STD_FRAME    = 0b11111111,   // XXXXX1XX
    CAN_TX_XTD_FRAME    = 0b11110111,   // XXXXX0XX

    CAN_TX_RTR_BIT      = 0b01000000,
    CAN_TX_NO_RTR_FRAME = 0b11111111,   // X1XXXXXX
    CAN_TX_RTR_FRAME    = 0b10111111    // X0XXXXXX
};

/*********************************************************************
 *
 * enum CAN_OP_MODE
 *
 * This enumeration values define codes related to CAN module
 * operation mode. CANSetOperationMode() routine requires this code.
 * These values must be used by itself
 * i.e. it cannot be ANDed to form * multiple values.
 *
 ********************************************************************/
enum CAN_OP_MODE
{
    CAN_OP_MODE_BITS    = 0b11100000,   // Use this to access opmode
                                        // bits
    CAN_OP_MODE_NORMAL  = 0b00000000,
    CAN_OP_MODE_SLEEP   = 0b00100000,
    CAN_OP_MODE_LOOP    = 0b01000000,
    CAN_OP_MODE_LISTEN  = 0b01100000,
    CAN_OP_MODE_CONFIG  = 0b10000000
};

/*********************************************************************
 *
 * enum CAN_CONFIG_FLAGS
 *
 * This enumeration values define flags related to configuring CAN
 * module. Routines CANInitialize() and CANSetBaudRate() use these
 * codes. One or more these values may be ANDed to form multiple
 * flags.
 *
 ********************************************************************/
enum CAN_CONFIG_FLAGS
{
    CAN_CONFIG_DEFAULT          = 0b11111111,   // 11111111

    CAN_CONFIG_PHSEG2_PRG_BIT   = 0b00000001,
    CAN_CONFIG_PHSEG2_PRG_ON    = 0b11111111,   // XXXXXXX1
    CAN_CONFIG_PHSEG2_PRG_OFF   = 0b11111110,   // XXXXXXX0

    CAN_CONFIG_LINE_FILTER_BIT  = 0b00000010,
    CAN_CONFIG_LINE_FILTER_ON   = 0b11111111,   // XXXXXX1X
    CAN_CONFIG_LINE_FILTER_OFF  = 0b11111101,   // XXXXXX0X

    CAN_CONFIG_SAMPLE_BIT       = 0b00000100,
    CAN_CONFIG_SAMPLE_ONCE      = 0b11111111,   // XXXXX1XX
    CAN_CONFIG_SAMPLE_THRICE    = 0b11111011,   // XXXXX0XX

    CAN_CONFIG_MSG_TYPE_BIT     = 0b00001000,
    CAN_CONFIG_STD_MSG          = 0b11111111,   // XXXX1XXX
    CAN_CONFIG_XTD_MSG          = 0b11110111,   // XXXX0XXX

    CAN_CONFIG_DBL_BUFFER_BIT   = 0b00010000,
    CAN_CONFIG_DBL_BUFFER_ON    = 0b11111111,   // XXX1XXXX
    CAN_CONFIG_DBL_BUFFER_OFF   = 0b11101111,   // XXX0XXXX

    CAN_CONFIG_MSG_BITS         = 0b01100000,
    CAN_CONFIG_ALL_MSG          = 0b11111111,   // X11XXXXX
    CAN_CONFIG_VALID_XTD_MSG    = 0b11011111,   // X10XXXXX
    CAN_CONFIG_VALID_STD_MSG    = 0b10111111,   // X01XXXXX
    CAN_CONFIG_ALL_VALID_MSG    = 0b10011111    // X00XXXXX
};

//////////////////////////////////////////////////////////////////////
/*********************************************************************
 *
 * enum CAN_MASK
 *
 * This enumeration values define mask codes.  Routine CANSetMask()
 * requires this code as one of its arguments.  These enumerations
 * must be used by itself i.e. it cannot be ANDed to form multiple
 * values.
 *
 ********************************************************************/
enum CAN_MASK
{
     CAN_MASK_B1,
     CAN_MASK_B2
};

/*********************************************************************
 *
 * enum CAN_FILTER
 *
 * This enumeration values define filter codes.  Routine CANSetFilter
 * requires this code as one of its arguments.  These enumerations
 * must be used by itself
 * i.e. it cannot be ANDed to form multiple values.
 *
 ********************************************************************/
enum CAN_FILTER
{
    CAN_FILTER_B1_F1,
    CAN_FILTER_B1_F2,
    CAN_FILTER_B2_F1,
    CAN_FILTER_B2_F2,
    CAN_FILTER_B2_F3,
    CAN_FILTER_B2_F4
};

/*********************************************************************
 *
 * enum CAN_RX_MSG_FLAGS
 *
 * This enumeration values define flags related to reception of a CAN
 * message.  There could be more than one this flag
 * ANDed together to form multiple flags.
 * If a particular bit is set, corresponding meaning is TRUE or else
 * it will be FALSE.
 *
 * e.g.
 *      if (MsgFlag & CAN_RX_OVERFLOW)
 *      {
 *          // Receiver overflow has occured.  We have lost previous
 *          // message.
 *          ...
 *      }
 *
 ********************************************************************/
enum CAN_RX_MSG_FLAGS
{
    CAN_RX_FILTER_BITS  = 0b00000111,   // Use this to access filter
                                        // bits
    CAN_RX_FILTER_1     = 0b00000000,
    CAN_RX_FILTER_2     = 0b00000001,
    CAN_RX_FILTER_3     = 0b00000010,
    CAN_RX_FILTER_4     = 0b00000011,
    CAN_RX_FILTER_5     = 0b00000100,
    CAN_RX_FILTER_6     = 0b00000101,

    CAN_RX_OVERFLOW     = 0b00001000,   // Set if Overflowed else
                                        // cleared

    CAN_RX_INVALID_MSG  = 0b00010000,   // Set if invalid else
                                        // cleared

    CAN_RX_XTD_FRAME    = 0b00100000,   // Set if XTD message else
                                        // cleared

    CAN_RX_RTR_FRAME    = 0b01000000,   // Set if RTR message else
                                        // cleared

    CAN_RX_DBL_BUFFERED = 0b10000000    // Set if this message was
                                        // hardware double-buffered
};

/*********************************************************************
 * Macro:           BOOL  CANIsRxReady()
 *
 * PreCondition:    None
 *
 * Input:           None
 *
 * Output:          TRUE if at least one of the CAN receive buffer is
 *                  full FALSE if none receive buffers are full.
 *
 * Side Effects:    None
 *
 * Errata:          This was incorrectly documented above as "empty"
 *                  instead of "full." -dgi 24oct2003
 *
 ********************************************************************/
#define CANIsRxReady()          (RXB0CON_RXFUL | RXB1CON_RXFUL)

/*********************************************************************
 * Macro:           BOOL CANIsTxReady()
 *
 * PreCondition:    None
 *
 * Input:           None
 *
 * Output:          TRUE if at least one CAN transmit buffer is empty
 *                  FALSE if all CAN transmit buffers are full
 *
 * Side Effects:    None
 *
 ********************************************************************/
#define CANIsTxReady()          (!TXB0CON_TXREQ || \
   !TXB1CON_TXREQ || \
      !TXB2CON_TXREQ )

#define CANIsTx0Ready()         (!TXB0CON_TXREQ)
#define CANIsTx1Ready()         (!TXB1CON_TXREQ)
#define CANIsTx2Ready()         (!TXB2CON_TXREQ)

void CANSetBaudRate(int SJW,int BRP,int PHSEG1,int PHSEG2,int PROPSEG,CAN_CONFIG_FLAGS flags);
void CANSetOperationMode(CAN_OP_MODE mode);
void CANInitialize(int SJW,int BRP,int PHSEG1,int PHSEG2,int PROPSEG,CAN_CONFIG_FLAGS config);
BOOLEAN CANSendMessage(int16 val,int8 buffSelect,BYTE* Data,BYTE DataLen,CAN_TX_MSG_FLAGS MsgFlags);
void CANSetMask(CAN_MASK code, int32 val, CAN_CONFIG_FLAGS type);
void CANIDToRegs(int *regaddress,int32 val,CAN_CONFIG_FLAGS type);
void RegsToCANID(int *regaddress,int32 *val,CAN_CONFIG_FLAGS type);
BOOLEAN CANReceiveMessage(int16 *id, BYTE *Data, BYTE *DataLen, CAN_RX_MSG_FLAGS *MsgFlags);
void CANSetFilter(CAN_FILTER code,int32 val,CAN_CONFIG_FLAGS type);
#endif